Taro Fujii
According to our database1,
Taro Fujii
authored at least 10 papers
between 1997 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
2000
2005
2010
2015
2020
0
1
2
3
1
1
2
1
1
2
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2018
New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
2013
Optimizing time and space multiplexed computation in a dynamically reconfigurable processor.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013
C-Based Adaptive Stream Processing on Dynamically Reconfigurable Hardware: A Case Study on Window Join.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013
2004
Techniques for Virtual Hardware on a Dynamically Reconfigurable Processor - An Approach to Tough Cases.
Proceedings of the Field Programmable Logic and Application, 2004
2002
Proceedings of the 2002 IEEE International Conference on Fuzzy Systems, 2002
2000
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000
Spatial-temporal mapping of real applications on a Dynamically Reconfigurable Logic Engine (DRLE) LSI.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000
1998
1997
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997