Tarek Ould Bachir

Orcid: 0000-0002-9000-5467

According to our database1, Tarek Ould Bachir authored at least 25 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
PrismParser: A Framework for Implementing Efficient P4-Programmable Packet Parsers on FPGA.
Future Internet, September, 2024

Innovative Non-Invasive and Non-Intrusive Precision Thermometry in Stainless-Steel Tanks Using Ultrasound Transducers.
Sensors, June, 2024

Enhancing P4 Syntax to Support Extended Finite State Machines as Native Stateful Objects.
Proceedings of the 10th IEEE International Conference on Network Softwarization, 2024

Normal and Resilient Mode FPGA-based Access Gateway Function Through P4-generated RTL.
Proceedings of the 20th International Conference on the Design of Reliable Communication Networks, 2024

2023
An Area-efficient Memory-based Architecture for P4-programmable Streaming Parsers in FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A PYNQ-Based Data Acquisition System for HIL Simulations on Low-Cost FPGAs.
Proceedings of the IEEE International Conference on Industrial Technology, 2023

Implementing and Evaluating a P4-based Access Gateway Function on a Tofino Switch.
Proceedings of the 6th International Conference on Advanced Communication Technologies and Networking, 2023

Efficient Region Proposal Extraction of Small Lung Nodules Using Enhanced VGG16 Network Model.
Proceedings of the 36th IEEE International Symposium on Computer-Based Medical Systems, 2023

2022
Methods for the Accurate Real-Time Simulation of High-Frequency Power Converters.
IEEE Trans. Ind. Electron., 2022

A Templated VHDL Architecture for Terabit/s P4-programmable FPGA-based Packet Parsing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Real-Time Simulation of a Fast Charger Using a Low-Cost FPGA Platform.
Proceedings of the IECON 2022, 2022

2021
A Direct Mapped Method for Accurate Modeling and Real-Time Simulation of High Switching Frequency Resonant Converters.
IEEE Trans. Ind. Electron., 2021

An FPGA-based Real-Time Simulation of a Hybrid Fuel Cell/Battery Source.
Proceedings of the 34th IEEE Canadian Conference on Electrical and Computer Engineering, 2021

Implementing Multistage Interconnection Networks on FPGA U sing Chisel Language.
Proceedings of the 34th IEEE Canadian Conference on Electrical and Computer Engineering, 2021

2019
A Low-Latency Reconfigurable Multistage Interconnection Network.
Proceedings of the 2019 IEEE Canadian Conference of Electrical and Computer Engineering, 2019

2018
An Evaluation of a High-Level Synthesis Approach to the FPGA-Based Submicrosecond Real-Time Simulation of Power Converters.
IEEE Trans. Ind. Electron., 2018

2015
A Network Tearing Technique for FPGA-Based Real-Time Simulation of Power Converters.
IEEE Trans. Ind. Electron., 2015

FPGA-based real-time simulation of a PSIM model: An indirect matrix converter case study.
Proceedings of the IECON 2015, 2015

2013
Self-Alignment Schemes for the Implementation of Addition-Related Floating-Point Operators.
ACM Trans. Reconfigurable Technol. Syst., 2013

A fully automated reconfigurable calculation engine dedicated to the real-time simulation of high switching frequency power electronic circuits.
Math. Comput. Simul., 2013

2012
A State-Space Modeling Approach for the FPGA-Based Real-Time Simulation of High Switching Frequency Power Converters.
IEEE Trans. Ind. Electron., 2012

Effective floating-point calculation engines intended for the FPGA-based HIL simulation.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

General-purpose reconfigurable low-latency electric circuit and motor drive solver on FPGA.
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012

2010
Performing Floating-Point Accumulation on a Modern FPGA in Single and Double Precision.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

2009
FPGA-driven pseudorandom number generators aimed at accelerating Monte Carlo methods.
Proceedings of the 7th IEEE/ACS International Conference on Computer Systems and Applications, 2009


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