Taras Ravsher
Orcid: 0000-0001-7862-5973
According to our database1,
Taras Ravsher
authored at least 8 papers
between 2019 and 2024.
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Bibliography
2024
Comprehensive Performance and Reliability Assessment of Se-based Selector-Only Memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin Amplification.
Proceedings of the IEEE International Memory Workshop, 2024
2023
NPN Si/SiGe memory selector with non-linearity>10<sup>5</sup> and ON-current>6MA/cm<sup>2</sup>.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023
2022
Enhanced performance and low-power capability of SiGeAsSe-GeSbTe 1S1R phase-change memory operated in bipolar mode.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Degradation mechanism of amorphous IGZO-based bipolar metal-semiconductor-metal selectors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
2021
Proceedings of the IEEE International Reliability Physics Symposium, 2021
Threshold switching in a-Si and a-Ge based MSM selectors and its implications for device reliability.
Proceedings of the IEEE International Memory Workshop, 2021
2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019