Tao-Yao Chang

According to our database, Tao-Yao Chang authored at least 6 papers between 2010 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

13.1 A fully integrated multimode front-end module for GSM/EDGE/TD-SCDMA/TD-LTE applications using a Class-F CMOS power amplifier.

Ming-Da Tsai, Chien-Cheng Lin, Ping-Yu Chen, Tao-Yao Chang, Chien-Wei Tseng, Lai-Ching Lin, Chris Beale, Bosen Tseng, Bernard Tenbroek, Chinq-Shiun Chiu, Guang-Kaai Dehng, George Chien

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015

A dual-band 802.11abgn/ac transceiver with integrated PA and T/R switch in a digital noise controlled SoC.

Yuan-Hung Chung, Che-Hung Liao, Chun-Wei Lin, Yi-Shing Shih, Chin-Fu Li, Meng-Hsiung Hung, Ming-Chung Liu, Pi-An Wu, Jui-Lin Hsu, Ming-Yeh Hsu, Sheng-Hao Chen, Po-Yu Chang, Chih-Hao Chen, Yu-Hsien Chang, Jun-Yu Chen, Tao-Yao Chang, George Chien

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

28.2 A 0.29mm² frequency synthesizer in 40nm CMOS with 0.19psrms jitter and.

YuLi Hsueh, Lan-Chou Cho, Chih-Hsien Shen, Yi-Chien Tsai, Tzu-Chan Chueh, Tao-Yao Chang, Jui-Lin Hsu, Jing-Hong Conan Zhan

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012

A 1V 19.3dBm 79GHz power amplifier in 65nm CMOS.

Kun-Yin Wang, Tao-Yao Chang, Chorng-Kuang Wang

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A low power W-band PLL with 17-mW in 65-nm CMOS technology.

Tao-Yao Chang, Chao-Shiun Wang, Chorng-Kuang Wang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010

A 77 GHz power amplifier using transformer-based power combiner in 90 nm CMOS.

Tao-Yao Chang, Chao-Shiun Wang, Chorng-Kuang Wang

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010