Tao Li
Affiliations:- University of Florida, Department of Electrical and Computer Engineering, Gainesville, FL, USA
- University of Texas at Austin, TX, USA (PhD)
According to our database1,
Tao Li
authored at least 177 papers
between 1999 and 2021.
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Bibliography
2021
Exploring Highly Dependable and Efficient Datacenter Power System Using Hybrid and Hierarchical Energy Buffers.
IEEE Trans. Sustain. Comput., 2021
IEEE Trans. Parallel Distributed Syst., 2021
Leveraging the Interplay of RAID and SSD for Lifetime Optimization of Flash-Based SSD RAID.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Toward Efficient Execution of Mainstream Deep Learning Frameworks on Mobile Devices: Architectural Implications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Computers, 2021
Democratic learning: hardware/software co-design for lightweight blockchain-secured on-device machine learning.
J. Syst. Archit., 2021
Proceedings of the Algorithms and Architectures for Parallel Processing, 2021
A Low Cost Weight Obfuscation Scheme for Security Enhancement of ReRAM Based Neural Network Accelerators.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
IEEE Trans. Parallel Distributed Syst., 2020
aeSpTV: An Adaptive and Efficient Framework for Sparse Tensor-Vector Product Kernel on a High-Performance Computing Platform.
IEEE Trans. Parallel Distributed Syst., 2020
An adaption scheduling based on dynamic weighted random forests for load demand forecasting.
J. Supercomput., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Pattern Recognit. Lett., 2020
Singular Spectrum Analysis for Local Differential Privacy of Classifications in the Smart Grid.
IEEE Internet Things J., 2020
A Survey on End-Edge-Cloud Orchestrated Network Computing Paradigms: Transparent Computing, Mobile Edge Computing, Fog Computing, and Cloudlet.
ACM Comput. Surv., 2020
IEEE Commun. Mag., 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
BBS: Micro-Architecture Benchmarking Blockchain Systems through Machine Learning and Fuzzy Set.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
IEEE Trans. Parallel Distributed Syst., 2019
Exploiting Parallelism for CNN Applications on 3D Stacked Processing-In-Memory Architecture.
IEEE Trans. Parallel Distributed Syst., 2019
Performance-Aware Model for Sparse Matrix-Matrix Multiplication on the Sunway TaihuLight Supercomputer.
IEEE Trans. Parallel Distributed Syst., 2019
A Temperature-Aware Reliability Enhancement Strategy for 3-D Charge-Trap Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
A Thermal-Aware Physical Space Reallocation for Open-Channel SSD With 3-D Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
An Energy Dynamic Control Algorithm Based on Reinforcement Learning for Data Centers.
Int. J. Pattern Recognit. Artif. Intell., 2019
Towards Efficient NVDIMM-based Heterogeneous Storage Hierarchy Management for Big Data Workloads.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
REcache: Efficient Sustainable Energy Management Circuits and Policies for Computing Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Eager pruning: algorithm and architecture support for fast training of deep neural networks.
Proceedings of the 46th International Symposium on Computer Architecture, 2019
Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019
Towards Cross-Platform Inference on Edge Devices with Emerging Neuromorphic Architecture.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
PATCH: Process-Variation-Resilient Space Allocation for Open-Channel SSD with 3D Flash.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
IEEE Trans. Parallel Distributed Syst., 2018
Exploring Customizable Heterogeneous Power Distribution and Management for Datacenter.
IEEE Trans. Parallel Distributed Syst., 2018
IEEE Trans. Parallel Distributed Syst., 2018
ACM Trans. Storage, 2018
Start Late or Finish Early: A Distributed Graph Processing System with Redundancy Reduction.
Proc. VLDB Endow., 2018
Edge-Oriented Computing Paradigms: A Survey on Architecture Design and System Management.
ACM Comput. Surv., 2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, 2018
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2018
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
Towards Efficient Microarchitecture Design of Simultaneous Localization and Mapping in Augmented Reality Era.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
Towards Efficient Microarchitectural Design for Accelerating Unsupervised GAN-Based Deep Learning.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
Enabling Efficient Network Service Function Chain Deployment on Heterogeneous Server Platform.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
Exploiting Dynamic Thermal Energy Harvesting for Reusing in Smartphone with Mobile Applications.
Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018
2017
Leveraging Time Prediction and Error Compensation to Enhance the Scalability of Parallel Multi-Core Simulations.
IEEE Trans. Parallel Distributed Syst., 2017
VarCatcher: A Framework for Tackling Performance Variability of Parallel Workloads on Multi-Core.
IEEE Trans. Parallel Distributed Syst., 2017
On the Implication of NTC versus Dark Silicon on Emerging Scale-Out Workloads: The Multi-Core Architecture Perspective.
IEEE Trans. Parallel Distributed Syst., 2017
IEEE Trans. Parallel Distributed Syst., 2017
IEEE Trans. Parallel Distributed Syst., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Knowl. Based Syst., 2017
Proceedings of the 2017 USENIX Annual Technical Conference, 2017
Proceedings of the International Conference for High Performance Computing, 2017
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017
Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the 37th IEEE International Conference on Distributed Computing Systems, 2017
Proceedings of the 37th IEEE International Conference on Distributed Computing Systems, 2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
Reducing the "Tax" of Reliability: A Hardware-Aware Method for Agile Data Persistence in Mobile Devices.
Proceedings of the 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017
2016
RE-UPS: an adaptive distributed energy storage system for dynamically managing solar energy in green datacenters.
J. Supercomput., 2016
IEEE Trans. Computers, 2016
ACM Trans. Auton. Adapt. Syst., 2016
J. Comput. Sci. Technol., 2016
Towards efficient server architecture for virtualized network function deployment: Implications and implementations.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Bridging the I/O performance gap for big data workloads: A new NVDIMM-based approach.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016
Proceedings of the 2016 International Conference on Supercomputing, 2016
Proceedings of the 2016 International Conference on Supercomputing, 2016
Proceedings of the 2016 International Conference on Supercomputing, 2016
Proceedings of the 45th International Conference on Parallel Processing, 2016
An adaptive Non-Uniform Loop Tiling for DMA-based bulk data transfers on many-core processor.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
Bridging the Semantic Gaps of GPU Acceleration for Scale-out CNN-based Big Data Processing: Think Big, See Small.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Computers, 2015
ACM J. Emerg. Technol. Comput. Syst., 2015
IEEE Comput. Archit. Lett., 2015
IEEE Comput. Archit. Lett., 2015
HEB: deploying and managing hybrid energy buffers for improving datacenter efficiency and economy.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015
Optimization of Resource Allocation and Energy Efficiency in Heterogeneous Cloud Data Centers.
Proceedings of the 44th International Conference on Parallel Processing, 2015
Understanding the virtualization "Tax" of scale-out pass-through GPUs in GaaS clouds: An empirical study.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015
Proceedings of the 45th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2015
Near threshold cloud processors for dark silicon mitigation: the impact on emerging scale-out workloads.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015
2014
Towards Automated Provisioning and Emergency Handling in Renewable Energy Powered Datacenters.
J. Comput. Sci. Technol., 2014
IEEE Comput. Archit. Lett., 2014
On Characterization of Performance and Energy Efficiency in Heterogeneous HPC Cloud Data Centers.
Proceedings of the IEEE 22nd International Symposium on Modelling, 2014
Understanding the Impact of vCPU Scheduling on DVFS-Based Power Management in Virtualized Cloud Environment.
Proceedings of the IEEE 22nd International Symposium on Modelling, 2014
Optimizing virtual machine consolidation performance on NUMA server architecture for cloud workloads.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the 2014 International Conference on Supercomputing, 2014
Proceedings of the 11th International Conference on Autonomic Computing, 2014
Proceedings of the International Green Computing Conference, 2014
Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014
2013
Optimizing virtual machine live storage migration in heterogeneous storage environment.
Proceedings of the ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (co-located with ASPLOS 2013), 2013
Proceedings of the ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (co-located with ASPLOS 2013), 2013
Proceedings of the ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, 2013
SolarTune: Real-time scheduling with load tuning for solar energy powered multicore systems.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013
Reliable Express-Virtual-Channel-based network-on-chip under the impact of technology scaling.
Proceedings of the International Symposium on Quality Electronic Design, 2013
Wall-clock based synchronization: A parallel simulation technology for cluster systems.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013
Understanding the implications of virtual machine management on processor microarchitecture design.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013
Chameleon: Adapting throughput server to time-varying green power budget using online learning.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Proceedings of the IEEE International Symposium on Workload Characterization, 2013
Exploring high-performance and energy proportional interface for phase change memory systems.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
Power-performance co-optimization of throughput core architecture using resistive memory.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013
DCNSim: a unified and cross-layer computer architecture simulation framework for data center network research.
Proceedings of the Computing Frontiers Conference, 2013
2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2011
Architecting high-performance energy-efficient soft error resilient cache under 3D integration technology.
Microprocess. Microsystems, 2011
Proceedings of the SIGMETRICS 2011, 2011
Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011
Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011
Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011
Optimizing throughput/power trade-offs in hardware transactional memory using DVFS and intelligent scheduling.
Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011
Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011
Helmet: A resistance drift resilient architecture for multi-level cell phase change memory system.
Proceedings of the 2011 IEEE/IFIP International Conference on Dependable Systems and Networks, 2011
2010
Exploring GPGPU workloads: Characterization methodology, analysis and microarchitecture evaluation implications.
Proceedings of the 2010 IEEE International Symposium on Workload Characterization, 2010
Architecting reliable multi-core network-on-chip for small scale processing technology.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010
2009
Thermal Design Space Exploration of 3D Die Stacked Multi-core Processors Using Geospatial-Based Predictive Models.
Proceedings of the Computer Performance Evaluation and Benchmarking, 2009
Characterizing and mitigating the impact of process variations on phase change based memory systems.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009
TransPlant: A parameterized methodology for generating transactional memory workloads.
Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009
Accurate, scalable and informative design space exploration for large and sophisticated multi-core oriented architectures.
Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009
Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009
TransMetric: architecture independent workload characterization for transactional memory benchmarks.
Proceedings of the 23rd international conference on Supercomputing, 2009
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009
Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures.
Proceedings of the PACT 2009, 2009
2008
Guest Editors' Introduction: Interaction of Many-Core Computer Architecture and Operating Systems.
IEEE Micro, 2008
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design.
Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008
ORBIT: Effective Issue Queue Soft-Error Vulnerability Mitigation on Simultaneous Multithreaded Architectures Using Operand Readiness-Based Instruction Dispatch.
Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Modeling and Analyzing the Effect of Microarchitecture Design Parameters on Microprocessor Soft Error Vulnerability.
Proceedings of the 16th International Symposium on Modeling, 2008
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis.
Proceedings of the 4th International Symposium on Workload Characterization (IISWC 2008), 2008
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures.
Proceedings of the 2008 International Conference on Parallel Processing, 2008
Combined circuit and microarchitecture techniques for effective soft error robustness in SMT processors.
Proceedings of the 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2008
Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education.
Proceedings of the Collaborative Computing: Networking, 2008
Managing multi-core soft-error reliability through utility-driven cross domain optimization.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
2007
OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems.
IEEE Trans. Computers, 2007
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007
Using Wavelet Domain Workload Execution Characteristics to Improve Accuracy, Scalability and Robustness in Program Phase Analysis.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007
Characterizing the Effect of Microarchitecture Design Parameters on Workload Dynamic Behavior.
Proceedings of the IEEE 10th International Symposium on Workload Characterization, 2007
2006
SIGARCH Comput. Archit. News, 2006
Microprocess. Microsystems, 2006
Proceedings of the 14th International Symposium on Modeling, 2006
Proceedings of the 25th IEEE International Performance Computing and Communications Conference, 2006
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006
2005
ACM Trans. Archit. Code Optim., 2005
Proceedings of the 13th International Symposium on Modeling, 2005
Bioinformatics on Embedded Systems: A Case Study of Computational Biology Applications on VLIW Architecture.
Proceedings of the Embedded Software and Systems, Second International Conference, 2005
Proceedings of the Fifth IEEE International Symposium on Bioinformatic and Bioengineering (BIBE 2005), 2005
2003
Proceedings of the International Conference on Measurements and Modeling of Computer Systems, 2003
Routine based OS-aware microprocessor resource adaptation for run-time operating system power saving.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
2002
Modeling and Evaluation of Control Flow Prediction Schemes Using Complete System Simulation and Java Workloads.
Proceedings of the 10th International Workshop on Modeling, 2002
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java Code.
Proceedings of the High Performance Computing, 2002
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002
2001
ADir_pNB: A Cost-Effective Way to Implement Full Map Directory-Based Cache Coherence Protocols.
IEEE Trans. Computers, 2001
Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001
2000
Proceedings of the 14th international conference on Supercomputing, 2000
1999
Microprocess. Microsystems, 1999