Takuya Terasawa

According to our database, Takuya Terasawa authored at least 9 papers between 1989 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2008

A Novel MAC Protocol for QoS in Ad Hoc Wireless Networks.

Kiyoshi Takahashi, Takuya Terasawa, Toshinori Tsuboi

IEICE Trans. Commun., 2008

2007

A MAC Protocol Using Energy Signals for QoS in Ad Hoc Wireless Networks.

Kiyoshi Takahashi, Takuya Terasawa, Toshinori Tsuboi

Proceedings of the 65th IEEE Vehicular Technology Conference, 2007

1998

An analysis of fairness and overhead in the arbitration protocol of the IEEE Futurebus standard.

Ou Yamamoto, Takuya Terasawa, Hideharu Amano

Syst. Comput. Jpn., 1998

1997

A study on snoop cache systems for single-chip multiprocessors.

Takuya Terasawa, Keisuke Inoue, Hitoshi Kurosawa, Hideharu Amano

Syst. Comput. Jpn., 1997

1996

ATTEMPT-1: A Reconfigurable Multiprocessor Testbed.

Keisuke Inoue, Toru Kisuki, Michitaka Okuno, Etsuko Shimizu, Takuya Terasawa, Hideharu Amano

Proceedings of the Field-Programmable Logic, 1996

1995

A Performance Evaluation of the Multiprocessor Testbed ATTEMPT-0.

Takuya Terasawa, Ou Yamamoto, Tomohiro Kudoh, Hideharu Amano

Parallel Comput., 1995

1993

A query-based parallel logic simulation algorithm.

Tomohiro Kudoh, Tetsuro Kimura, Hideharu Amano, Takuya Terasawa

Syst. Comput. Jpn., 1993

1992

A Parallel Logic Simulation Algorithm Based on Query.

Tomohiro Kudoh, Tetsuro Kimura, Hideharu Amano, Takuya Terasawa

Proceedings of the 1992 International Conference on Parallel Processing, 1992

1989

Cache with Synchronization Mechanism.

Hideharu Amano, Takuya Terasawa, Tomohiro Kudoh

Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989