Takuya Kojima

Orcid: 0000-0002-5943-444X

According to our database1, Takuya Kojima authored at least 43 papers between 1997 and 2024.

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Bibliography

2024
Applying Run-Length Compression to the Configuration Data of SLM Fine-Grained Reconfigurable Logic.
IEICE Trans. Inf. Syst., 2024

Situation-based Proactive Human-Robotic Systems Interaction and Collaboration in Future Convenience Stores.
Proceedings of the IEEE/SICE International Symposium on System Integration, 2024

Development of an Environmentally Independent Mobile Manipulation System for Product Disposal in Retail Stores.
Proceedings of the IEEE/SICE International Symposium on System Integration, 2024

A Scalable Mapping Method for Elastic CGRAs.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

MLIR-Based Homomorphic Encryption Compiler for GPU.
Proceedings of the 14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2024

SLMLET: A RISC-V Processor SoC with Tightly-Coupled Area-Efficient eFPGA Blocks.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2024

2023
A Variation-Aware MTJ Store Energy Estimation Model for Edge Devices With Verify-and-Retryable Nonvolatile Flip-Flops.
IEEE Trans. Very Large Scale Integr. Syst., April, 2023

A Scalable Body Bias Optimization Method Toward Low-Power CGRAs.
IEEE Micro, 2023

ILP Based Mapping for Elastic CGRAs.
Proceedings of the 29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2023

An Area-Efficient Coarse-Grained Reconfigurable Array Design for Approximate Computing.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

2022
Mapping-Aware Kernel Partitioning Method for CGRAs Assisted by Deep Learning.
IEEE Trans. Parallel Distributed Syst., 2022

An efficient compilation of coarse-grained reconfigurable architectures utilizing pre-optimized sub-graph mappings.
Proceedings of the 30th Euromicro International Conference on Parallel, 2022

An Architecture- Independent CGRA Compiler enabling OpenMP Applications.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage.
Proceedings of the International Conference on Field-Programmable Technology, 2022

Body Bias Control on a CGRA based on Convex Optimization.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022

The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC.
Proceedings of the IEEE International Conference on Cluster Computing, 2022

2021
Recovering Faulty Non-Volatile Flip Flops for Coarse-Grained Reconfigurable Architectures.
IEICE Trans. Electron., 2021

Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops.
Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021

2020
GenMap: A Genetic Algorithmic Approach for Optimizing Spatial Mapping of Coarse-Grained Reconfigurable Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
Burst-Mode CMOS Transimpedance Amplifier Based on a Regulated-Cascode Circuit with Gain-Mode Switching.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

A Fine-Grained Multicasting of Configuration Data for Coarse-Grained Reconfigurable Architectures.
IEICE Trans. Inf. Syst., 2019

Refinements in Data Manipulation Method for Coarse Grained Reconfigurable Architectures.
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

Automatic anatomy partitioning of the torso region on CT images by using a deep convolutional network with majority voting.
Proceedings of the Medical Imaging 2019: Computer-Aided Diagnosis, San Diego, 2019

A Preliminary Evaluation of Building Block Computing Systems.
Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

A Coarse-Grained Reconfigurable Architecture with a Fault Tolerant Non-Volatile Configurable Memory.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Real Chip Performance Evaluation on Through Chip Interface IP for Renesas SOTB 65nm Process.
Proceedings of the Seventh International Symposium on Computing and Networking Workshops, 2019

Demonstration of Low Power Stream Processing Using a Variable Pipelined CGRA.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

2018
Optimization of Body Biasing for Variable Pipelined Coarse-Grained Reconfigurable Architectures.
IEICE Trans. Inf. Syst., 2018

Performance evaluation of 2D and 3D deep learning approaches for automatic segmentation of multiple organs on CT images.
Proceedings of the Medical Imaging 2018: Computer-Aided Diagnosis, 2018

Real Chip Evaluation of a Low Power CGRA with Optimized Application Mapping.
Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018

A Configuration Data Multicasting Method for Coarse-Grained Reconfigurable Architectures.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017
Glitch-aware variable pipeline optimization for CGRAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

The Design and Implementation of Scalable Deep Neural Network Accelerator Cores.
Proceedings of the 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2017

Scalable deep neural network accelerator cores with cubic integration using through chip interface.
Proceedings of the International SoC Design Conference, 2017

Body bias optimization for variable pipelined CGRA.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2013
Impression survey of the emotion expression humanoid robot with mental model based dynamic emotions.
Proceedings of the 2013 IEEE International Conference on Robotics and Automation, 2013

2010
Integration of emotion expression and visual tracking locomotion based on Vestibulo-Ocular Reflex.
Proceedings of the 19th IEEE International Conference on Robot and Human Interactive Communication, 2010

2002
Humanoid Robots in Waseda University-Hadaly-2 and WABIAN.
Auton. Robots, 2002

1998
Relations between Skill and the Use of Terms - An Analysis of Protocols of the Game of Go.
Proceedings of the Computers and Games, First International Conference, 1998

A Two-Step Model of Pattern Acquisition: Application to Tsume-Go.
Proceedings of the Computers and Games, First International Conference, 1998

1997
An Evolutionary Algorithm Extended by Ecological Analogy and its Application to the Game of Go.
Proceedings of the Fifteenth International Joint Conference on Artificial Intelligence, 1997


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