Takuya Imamoto

According to our database, Takuya Imamoto authored at least 5 papers between 2011 and 2012.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2012

Source/Drain Engineering for High Performance Vertical MOSFET.

Takuya Imamoto, Tetsuo Endoh

IEICE Trans. Electron., 2012

2011

Temperature Dependency of Driving Current in High-k/Metal Gate MOSFET and Its Influence on CMOS Inverter Circuit.

Takeshi Sasaki, Takuya Imamoto, Tetsuo Endoh

IEICE Trans. Electron., 2011

Verification of Stable Circuit Operation of 180 nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation.

Masashi Kamiyanagi, Takuya Imamoto, Takeshi Sasaki, Hyoungjun Na, Tetsuo Endoh

IEICE Trans. Electron., 2011

Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET with 65 nm CMOS Process.

Takuya Imamoto, Takeshi Sasaki, Tetsuo Endoh

IEICE Trans. Electron., 2011

The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-Speed Operation.

Tetsuo Endoh, Masashi Kamiyanagi, Masakazu Muraguchi, Takuya Imamoto, Takeshi Sasaki

IEICE Trans. Electron., 2011