Takuji Miki

According to our database, Takuji Miki authored at least 30 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Si-Backside Side-Channel Leakage Measurement and Simulation.

Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata, Lang Lin, Akhilesh Kumar, Norman Chang

Proceedings of the 21st International SoC Design Conference, 2024

Fault Injection Attacks Exploiting High Voltage Pulsing over Si-Substrate Backside of IC chips.

Yusuke Hayashi, Rikuu Hasegawa, Takuya Wadatsumi, Kazuki Monta, Takuji Miki, Makoto Nagata

Proceedings of the Workshop on Fault Detection and Tolerance in Cryptography, 2024

Modeling and Analysis of On-Chip Voltage Fluctuations Caused by Electromagnetic Fault Injection.

Takuya Wadatsumi, Rikuu Hasegawa, Kazuki Monta, Takuji Miki, Lang Lin, Norman Chang, Makoto Nagata

Proceedings of the 14th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2024

On-Chip Evaluation of Voltage Drops and Fault Occurrence Induced by Si Backside EM Injection.

Rikuu Hasegawa, Kazuki Monta, Takuya Wadatsumi, Takuji Miki, Makoto Nagata

Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2024

2023

Experimental Exploration of the Backside ESD Impacts on an IC Chip in Flip Chip Packaging.

Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Kikuo Muramatsu, Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo, Takuji Miki, Makoto Nagata

IEICE Trans. Electron., October, 2023

An Analog Side-Channel Attack on a High-Speed Asynchronous SAR ADC Using Dual Neural Network Technique.

Ryozo Takahashi, Takuji Miki, Makoto Nagata

IEICE Trans. Electron., October, 2023

A Triturated Sensing System.

Noriyuki Miura, Kotaro Naruse, Jun Shiomi, Yoshihiro Midoh, Tetsuya Hirose, Takaaki Okidono, Takuji Miki, Makoto Nagata

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

Characterization of Backside ESD Impacts on Integrated Circuits.

Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Kazuki Monta, Takuji Miki, Makoto Nagata

Proceedings of the IEEE International Reliability Physics Symposium, 2023

A 13-bit Radiation-Hardened SAR-ADC with Error Correction by Adaptive Topology Transformation.

Yuya Aoki, Tatsuya Iwata, Takuji Miki, Kazutoshi Kobayashi, Takefumi Yoshikawa

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022

Physical Attack Protection Techniques for IC Chip Level Hardware Security.

Makoto Nagata, Takuji Miki, Noriyuki Miura

IEEE Trans. Very Large Scale Integr. Syst., 2022

An 11-bit 0.008mm² charge-redistribution digital-to-analog converter operating at cryogenic temperature for large-scale qubit arrays.

Takuji Miki, Ryozo Takahashi, Makoto Nagata

IEICE Electron. Express, 2022

Testing Embedded Toggle Generation Through On-Chip IR-Drop Measurements.

Kazuki Monta, Leonidas Katselas, Ferenc Fodor, Takuji Miki, Alkis A. Hatzopoulos, Makoto Nagata, Erik Jan Marinissen

IEEE Des. Test, 2022

Voltage Surges by Backside ESD Impacts on IC Chip in Flip Chip Packaging.

Takuya Wadatsumi, Kohei Kawai, Rikuu Hasegawa, Takuji Miki, Makoto Nagata, Kikuo Muramatsu, Hiromu Hasegawa, Takuya Sawada, Takahito Fukushima, Hisashi Kondo

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2020

A Random Interrupt Dithering SAR Technique for Secure ADC Against Reference-Charge Side-Channel Attack.

Takuji Miki, Noriyuki Miura, Hiroki Sonoda, Kento Mizuta, Makoto Nagata

IEEE Trans. Circuits Syst. II Express Briefs, 2020

Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices.

Takuji Miki, Makoto Nagata, Hiroki Sonoda, Noriyuki Miura, Takaaki Okidono, Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi

IEEE J. Solid State Circuits, 2020

2019

A 0.72pJ/bit 400μm² Physical Random Number Generator Utilizing SAR Technique for Secure Implementation on Sensor Nodes.

Takuji Miki, Noriyuki Miura, Makoto Nagata

IEICE Trans. Electron., 2019

On-Chip Physical Attack Protection Circuits for Hardware Security : Invited Paper.

Makoto Nagata, Takuji Miki, Noriyuki Miura

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

Over-the-top Si Interposer Embedding Backside Buried Metal PDN to Reduce Power Supply Impedance of Large Scale Digital ICs.

Takuji Miki, Makoto Nagata, Akihiro Tsukioka, Noriyuki Miura, Takaaki Okidono, Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi

Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2017

A 2-GS/s 8-bit Time-Interleaved SAR ADC for Millimeter-Wave Pulsed Radar Baseband SoC.

Takuji Miki, Toshiaki Ozeki, Jun-ichi Naka

IEEE J. Solid State Circuits, 2017

A 500 MHz-BW -52.5 dB-THD Voltage-to-Time Converter Utilizing Two-Step Transition Inverter Delay Lines in 28 nm CMOS.

Takuji Miki, Noriyuki Miura, Kento Mizuta, Shiro Dosho, Makoto Nagata

IEICE Trans. Electron., 2017

2016

A 97.99 dB SNDR, 2 kHz BW, 37.1 µW noise-shaping SAR ADC with dynamic element matching and modulation dither effect.

Koji Obata, Kazuo Matsukawa, Takuji Miki, Yusuke Tsukamoto, Koji Sushihara

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

A 500MHz-BW -52.5dB-THD Voltage-to-Time Converter utilizing a two-step transition inverter.

Takuji Miki, Noriyuki Miura, Kento Mizuta, Shiro Dosho, Makoto Nagata

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

A 2GS/s 8b time-interleaved SAR ADC for millimeter-wave pulsed radar baseband SoC.

Takuji Miki, Toshiaki Ozeki, Jun-ichi Naka

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015

A 1 mm Pitch 80 × 80 Channel 322 Hz Frame-Rate Multitouch Distribution Sensor With Two-Step Dual-Mode Capacitance Scan.

Noriyuki Miura, Shiro Dosho, Hiroyuki Tezuka, Takuji Miki, Daisuke Fujimoto, Takuya Kiriyama, Makoto Nagata

IEEE J. Solid State Circuits, 2015

A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques.

Takuji Miki, Takashi Morie, Kazuo Matsukawa, Yoji Bando, Takeshi Okumoto, Koji Obata, Shiro Sakiyama, Shiro Dosho

IEEE J. Solid State Circuits, 2015

2014

12.4 A 1mm-pitch 80×80-channel 322Hz-frame-rate touch sensor with two-step dual-mode capacitance scan.

Noriyuki Miura, Shiro Dosho, Satoshi Takaya, Daisuke Fujimoto, Takuya Kiriyama, Hiroyuki Tezuka, Takuji Miki, Hiroto Yanagawa, Makoto Nagata

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013

A 71dB-SNDR 50MS/s 4.2mW CMOS SAR ADC by SNR enhancement techniques utilizing noise.

Takashi Morie, Takuji Miki, Kazuo Matsukawa, Yoji Bando, Takeshi Okumoto, Koji Obata, Shiro Sakiyama, Shiro Dosho

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

An 11-b 300-MS/s Double-Sampling Pipelined ADC With On-Chip Digital Calibration for Memory Effects.

Takuji Miki, Takashi Morie, Toshiaki Ozeki, Shiro Dosho

IEEE J. Solid State Circuits, 2012

2009

Design methods for pipeline & delta-sigma A-to-D converters with convex optimization.

Kazuo Matsukawa, Takashi Morie, Yusuke Tokunaga, Shiro Sakiyama, Yosuke Mitani, Masao Takayama, Takuji Miki, Akinori Matsumoto, Koji Obata, Shiro Dosho

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2006

Configurable multi-processor architecture and its processor element design.

Tsutomu Nishimura, Takuji Miki, Hiroaki Sugiura, Yuki Matsumoto, Masatsugu Kobayashi, Toshiyuki Kato, Tsutomu Eda, Hironori Yamauchi

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006