Takeshi Tokuda

According to our database1, Takeshi Tokuda authored at least 8 papers between 1983 and 1993.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

1984
1986
1988
1990
1992
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1
2
3
1
1
1
1
1
1
1
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Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1993
Fuzzy inference and fuzzy inference processor.
IEEE Micro, 1993

A Built-in Self- Test for ADC and DAC in a Single-Chip Speech CODEC.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1991
A Data-Driven Architecture for Distributed Parallel Processing.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1990
A 100-mega-access per second matching memory for a data-driven microprocessor.
IEEE J. Solid State Circuits, February, 1990

Built-in self-test in a 24 bit floating point digital signal processor.
Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1988
A macrocell approach for VLSI processor design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

1984
A Hierarchical Standard Cell Approach for Custom VLSI Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1984

1983
Delay-Time Modeling for ED MOS Logic LSI.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983


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