Takeshi Nagai

According to our database, Takeshi Nagai authored at least 3 papers between 1996 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

An 833MHz Pseudo-Two-Port Embedded DRAM for Graphics Applications.

Mariko Kaku, Hitoshi Iwai, Takeshi Nagai, Masaharu Wada, Atsushi Suzuki, Tomohisa Takai, Naoko Itoga, Takayuki Miyazaki, Takayuki Iwai, Hiroyuki Takenaka, Takehiko Hojo, Shinji Miyano, Nobuaki Otsuka

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006

A 65nm low-power embedded DRAM with extended data-retention sleep mode.

Takeshi Nagai, Masaharu Wada, Hitoshi Iwai, Mariko Kaku, Atsushi Suzuki, Tomohisa Takai, Naoko Itoga, Takayuki Miyazaki, Hiroyuki Takenaka, Takehiko Hojo, Shinji Miyano

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

1996

A 286 mm² 256 Mb DRAM with ×32 both-ends DQ.

Yohji Watanabe, Ring Wong, Toshiaki Kirihata, Daisuke Kato, John K. DeBrosse, Takahiko Rara, Munehiro Yoshida, Rideo Mukai, Khandker N. Quader, Takeshi Nagai, Peter Poechmueller, Peter Pfefferl, Matthew R. Wordeman, Shuso Fujii

IEEE J. Solid State Circuits, 1996