Takeshi Miyaba
According to our database1,
Takeshi Miyaba
authored at least 6 papers
between 1999 and 2014.
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Bibliography
2014
A 2.9mW, +/- 85ppm accuracy reference clock generator based on RC oscillator with on-chip temperature calibration.
Proceedings of the Symposium on VLSI Circuits, 2014
2013
A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2002
A 44-mm<sup>2</sup> four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller.
IEEE J. Solid State Circuits, 2002
2001
IEEE J. Solid State Circuits, 2001
2000
A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme.
IEEE J. Solid State Circuits, 2000
1999
IEEE J. Solid State Circuits, 1999