Takeo Matsuki

According to our database1, Takeo Matsuki authored at least 2 papers between 1996 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
0
1
2
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2005
Gate-Last MISFET Structures and Process for Characterization of High-k and Metal Gate MISFETs.
IEICE Trans. Electron., 2005

1996
A 60-ns 1-Mb nonvolatile ferroelectric memory with a nondriven cell plate line write/read scheme.
IEEE J. Solid State Circuits, 1996


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