Takefumi Miyoshi

According to our database, Takefumi Miyoshi authored at least 31 papers between 2005 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2023

A Fully Pipelined Architecture of Quantum-Classical Interface for Realizing Fault-Tolerant Quantum Computer.

Takefumi Miyoshi, Keisuke Koike, Shinich Morisaka, Hidehisa Shiomi, Ryo Matsuda, Kazuhisa Ogawa, Yutaka Tabuchi, Makoto Negoro

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

A state vector quantum simulator working on FPGAs with extensible SATA storage.

Kaijie Wei, Ryohei Niwase, Hideharu Amano, Yoshiki Yamaguchi, Takefumi Miyoshi

Proceedings of the International Conference on Field Programmable Technology, 2023

Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages.

Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi, Kaijie Wei, Hideharu Amano, Takefumi Miyoshi

Proceedings of the International Conference on Field Programmable Technology, 2023

2022

FPL Demo: A Flexible and Scalable Quantum-Classical Interface based on FPGAs.

Takefumi Miyoshi, Keisuke Koike, Shinich Morisaka, Hidehisa Shiomi, Kazuhisa Ogawa, Yutaka Tabuchi, Makoto Negoro

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

2017

Hardware Acceleration with Multi-Threading of Java-Based High Level Synthesis Tool.

Yuto Ishikawa, Keitaro Yanai, Keisuke Koike, Takefumi Miyoshi, Hironori Nakajo

Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

2015

Design and Evaluation of a Configurable Query Processing Hardware for Data Streams.

Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, Tsutomu Yoshinaga

IEICE Trans. Inf. Syst., 2015

Hexa Cam: An FPGA-Based Multi-view Camera System.

Abraham Monrroy, Manato Hirabayashi, Shinpei Kato, Masato Edahiro, Takefumi Miyoshi, Satoshi Funada

Proceedings of the 2015 IEEE 3rd International Conference on Cyber-Physical Systems, 2015

2013

A fast handshake join implementation on FPGA with adaptive merging network.

Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga

Proceedings of the Conference on Scientific and Statistical Database Management, 2013

An Efficient and Scalable Implementation of Sliding-Window Aggregate Operator on FPGA.

Yasin Oge, Masato Yoshimi, Takefumi Miyoshi, Hideyuki Kawashima, Hidetsugu Irie, Tsutomu Yoshinaga

Proceedings of the First International Symposium on Computing and Networking, 2013

2012

Design and Implementation of a Handshake Join Architecture on FPGA.

Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga

IEICE Trans. Inf. Syst., 2012

Using Cacheline Reuse Characteristics for Prefetcher Throttling.

Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga

IEICE Trans. Inf. Syst., 2012

Design and Implementation of a Merging Network Architecture for Handshake Join Operator on FPGA.

Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga

Proceedings of the IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, 2012

Throttling Control for Bufferless Routing in On-chip Networks.

Yicheng Guan, Cisse Ahmadou Dit Adi, Takefumi Miyoshi, Michihiro Koibuchi, Hidetsugu Irie, Tsutomu Yoshinaga

Proceedings of the IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, 2012

FLAT: a GPU programming framework to provide embedded MPI.

Takefumi Miyoshi, Hidetsugu Irie, Keigo Shima, Hiroki Honda, Masaaki Kondo, Tsutomu Yoshinaga

Proceedings of the 5th Annual Workshop on General Purpose Processing with Graphics Processing Units, 2012

2011

An Efficient Path Setup for a Hybrid Photonic Network-on-Chip.

Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga

Int. J. Netw. Comput., 2011

Computation-Communication Overlap of Linpack on a GPU-Accelerated PC Cluster.

Junichi Ohmura, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga

IEICE Trans. Inf. Syst., 2011

Multi-GPU Acceleration of Optical Flow Computation in Visual Functional Simulation.

Junichi Ohmura, Akira Egashira, Shunji Satoh, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga

Proceedings of the Second International Conference on Networking and Computing, 2011

An Implementation of Handshake Join on FPGA.

Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga

Proceedings of the Second International Conference on Networking and Computing, 2011

CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection.

Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga

Proceedings of the Second International Conference on Networking and Computing, 2011

A Coarse Grain Reconfigurable Processor Architecture for Stream Processing Engine.

Takefumi Miyoshi, Hideyuki Kawashima, Yuta Terada, Tsutomu Yoshinaga

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010

OREX - An Optical Ring with Electrical Crossbar Hybrid Photonic Network-on-Chip.

Cisse Ahmadou Dit Adi, Ping Qiu, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga

Proceedings of the International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, 2010

Parallel Matrix-Matrix Multiplication Based on HPL with a GPU-Accelerated PC Cluster.

Qin Wang, Junichi Ohmura, Axida Shan, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga

Proceedings of the First International Conference on Networking and Computing, 2010

Smart Core System for Dependable Many-Core Processor with Multifunction Routers.

Shinya Takamaeda, Shimpei Sato, Takefumi Miyoshi, Kenji Kise

Proceedings of the First International Conference on Networking and Computing, 2010

Pattern-Based Systematic Task Mapping for Many-Core Processors.

Shintaro Sano, Masahiro Sano, Shimpei Sato, Takefumi Miyoshi, Kenji Kise

Proceedings of the First International Conference on Networking and Computing, 2010

CODIE: Continuation-Based Overlapping Data-Transfers with Instruction Execution.

Takefumi Miyoshi, Kenji Kise, Hidetsugu Irie, Tsutomu Yoshinaga

Proceedings of the First International Conference on Networking and Computing, 2010

An Efficient Path Setup for a Photonic Network-on-Chip.

Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga

Proceedings of the First International Conference on Networking and Computing, 2010

2009

Triple Line-Based Playout for Go - An Accelerator for Monte Carlo Go.

Kenichi Koizumi, Mary Inaba, Kei Hiraki, Yasuo Ishii, Takefumi Miyoshi, Kazuki Yoshizoe

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

A Study of an Infrastructure for Research and Development of Many-Core Processors.

Koh Uehara, Shimpei Sato, Takefumi Miyoshi, Kenji Kise

Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

2007

Fine-grain compensation method with consideration of trade-offs between computation and data transfer for power consumption.

Takefumi Miyoshi, Nobuhiko Sugino

SIGARCH Comput. Archit. News, 2007

Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation.

Takefumi Miyoshi, Nobuhiko Sugino

IEICE Trans. Inf. Syst., 2007

2005

Unified Phase Compiler by Use of 3-D Representation Space.

Takefumi Miyoshi, Nobuhiko Sugino

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005