Takatomo Enoki

According to our database1, Takatomo Enoki authored at least 16 papers between 1997 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2013, "For contributions to compound semiconductor high speed integrated circuits for optical and wireless communication systems".

Timeline

1998
2000
2002
2004
2006
2008
0
1
2
3
4
5
6
2
3
1
5
2
1
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
Emitter-metal-related degradation in InP-based HBTs operating at high current density and its suppression by refractory metal.
Microelectron. Reliab., 2009

A 125-GHz 140-mW InGaAs/InP composite-channel HEMT MMIC power amplifier module.
IEICE Electron. Express, 2009

2006
Novel Fabrication Technology for High Yield Sub-100-nm-Gate InP-Based HEMTs.
IEICE Trans. Electron., 2006

W-Band Active Integrated Antenna Oscillator Based on Full-Wave Design Methodology and 0.1-µm Gate InP-Based HEMTs.
IEICE Trans. Electron., 2006

Special Section on Heterostructure Microelectronics with TWHM2005.
IEICE Trans. Electron., 2006

2005
High-bit-rate low-power decision circuit using InP-InGaAs HBT technology.
IEEE J. Solid State Circuits, 2005

2004
A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector.
IEEE J. Solid State Circuits, 2004

100-Gb/s multiplexing and demultiplexing IC operations in InP HEMT technology.
IEEE J. Solid State Circuits, 2004

Photoreceiver module using an InP HEMT transimpedance amplifier for over 40 gb/s.
IEEE J. Solid State Circuits, 2004

Suppression of short-channel effect in pseudomorphic In0.25Al0.75P/In0.75Ga0.25As high electron mobility transistors.
IEICE Electron. Express, 2004

Low-power and High-speed SCFL-inverter Using Pseudomorphic InGaAs Channel High Electron Mobility Transistors.
IEICE Electron. Express, 2004

2003
50-Gb/s 4-b multiplexer/demultiplexer chip set using InP HEMTs.
IEEE J. Solid State Circuits, 2003

A 10-Gb/s data-pattern independent clock and data recovery circuit with a two-mode phase comparator.
IEEE J. Solid State Circuits, 2003

2002
Low-power 1: 16 DEMUX and one-chip CDR with 1: 4 DEMUX using InP-InGaAs heterojunction bipolar transistors.
IEEE J. Solid State Circuits, 2002

1998
An 80-Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs.
IEEE J. Solid State Circuits, 1998

1997
40-Gb/s ICs for future lightwave communications systems.
IEEE J. Solid State Circuits, 1997


  Loading...