Takashi Watanabe

Affiliations:
  • Brookman Technology, Inc., Hamamatsu, Japan
  • Shizuoka University, Hamamatsu, Japan


According to our database1, Takashi Watanabe authored at least 6 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2019
Noise suppression effect of folding-integration applied to a column-parallel 3-stage pipeline ADC in a 2.1 μm 33-megapixel CMOS image sensor.
Proceedings of the Image Sensors and Imaging Systems 2019, 2019

2018
A 33Mpixel CMOS imager with multi-functional 3-stage pipeline ADC for 480fps high-speed mode and 120fps low-noise mode.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2012
A Low-Noise High Intrascene Dynamic Range CMOS Image Sensor With a 13 to 19b Variable-Resolution Column-Parallel Folding-Integration/Cyclic ADC.
IEEE J. Solid State Circuits, 2012

A 33Mpixel 120fps CMOS image sensor using 12b column-parallel pipelined cyclic ADCs.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
An 80μVrms-temporal-noise 82dB-dynamic-range CMOS Image Sensor with a 13-to-19b variable-resolution column-parallel folding-integration/cyclic ADC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009
A 0.1e- vertical FPN 4.7e- read noise 71dB DR CMOS image sensor with 13b column-parallel single-ended cyclic ADCs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009


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