Takashi Nojima

According to our database, Takashi Nojima authored at least 4 papers between 2004 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

Formulating the Empirical Strategies in Module Generation of Analog MOS Layout.

Tan Yan, Shigetoshi Nakatake, Takashi Nojima

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Adaptive Porting of Analog IPs with Reusable Conservative Properties.

Takashi Nojima, Nobuto Ono, Shigetoshi Nakatake, Toru Fujimura, Koji Okazaki, Yoji Kajitani

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

2004

A device-level placement with multi-directional convex clustering.

Takashi Nojima, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Multi-level placement with circuit schema based clustering in analog IC layouts.

Takashi Nojima, Xiaoke Zhu, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004