Takashi Manabe
According to our database1,
Takashi Manabe
authored at least 3 papers
between 1994 and 2000.
Collaborative distances:
Collaborative distances:
Timeline
1994
1995
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1997
1998
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2000
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2000
Dynamic Stability Analysis of Flow-Conveying Pipe with Two Lumped Masses by Domain Decomposition BEM.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000
1995
Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications.
IEEE J. Solid State Circuits, June, 1995
1994
A 3.84 GIPS integrated memory array processor with 64 processing elements and a 2-Mb SRAM.
IEEE J. Solid State Circuits, November, 1994