Takashi Kubo

According to our database, Takashi Kubo authored at least 7 papers between 2000 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Real-Time Experiment and Numerical Analysis of Highly-Survivable Adaptive Restoration for High-Capacity Optical Signal Transmission.

Hiroki Kawahara, Kohei Saito, Masahiro Nakagawa, Takashi Kubo, Takeshi Seki, Takeshi Kawasaki, Hideki Maeda

IEICE Trans. Commun., 2021

Semantic Segmentation of Atherosclerosis in Superficial Layer of IVOCT Images Using Deep Learning.

Xinbo Ren, Haiyuan Wu, Toshiyuki Imai, Yuxia Zhao, Takashi Kubo

Proceedings of the WI-IAT '21: IEEE/WIC/ACM International Conference on Web Intelligence, Hybrid Event / Melbourne, VIC, Australia, December 14 - 17, 2021, 2021

2019

Quantum Master Equation Approach to Singlet Fission Dynamics in Pentacene Linear Aggregate Models: Size Dependences of Excitonic Coupling Effects.

Masayoshi Nakano, Takanori Nagami, Takayoshi Tonami, Kenji Okada, Soichi Ito, Ryohei Kishi, Yasutaka Kitagawa, Takashi Kubo

J. Comput. Chem., 2019

A Local Multi-Layer Model for Tissue Classification of <i>in-vivo</i> Atherosclerotic Plaques in Intravascular Optical Coherence Tomography.

Xinbo Ren, Haiyuan Wu, Qian Chen, Toshiyuki Imai, Takashi Kubo, Takashi Akasaka

IEICE Trans. Inf. Syst., 2019

Real-time demonstration of 600Gbps/carrier WDM transmission and highly-survivable adaptive restoration on field installed fiber.

Hiroki Kawahara, Kohei Saito, Masahiro Nakagawa, Takashi Kubo, Takeshi Seki, Takeshi Kawasaki, Hideki Maeda, Tomohiro Sekino, Naoki Bannai, Masaki Shinkai, Tomoki Sakamaki, Kenjiro Yamanaka, Takashi Kurimoto

Proceedings of the 2019 24th OptoElectronics and Communications Conference (OECC) and 2019 International Conference on Photonics in Switching and Computing (PSC), 2019

2004

A 667-Mb/s operating digital DLL architecture for 512-Mb DDR SDRAM.

Takeshi Hamamoto, Kiyohiro Furutani, Takashi Kubo, Satoshi Kawasaki, Hironori Iga, Takashi Kono, Yasuhiro Konishi, Tsutomu Yoshihara

IEEE J. Solid State Circuits, 2004

2000

A 0.18-μm 256-Mb DDR-SDRAM with low-cost post-mold tuning method for DLL replica.

Shigehiro Kuge, Tetsuo Kato, Kiyohiro Furutani, Shigeru Kikuda, Katsuyoshi Mitsui, Takeshi Hamamoto, Jun Setogawa, Kei Hamade, Yuichiro Komiya, Satoshi Kawasaki, Takashi Kono, Teruhiko Amano, Takashi Kubo, Masaru Haraguchi, Yoshito Nakaoka, Mihoko Akiyama, Yasuhiro Konishi, Hideyuki Ozaki, Tsutomu Yoshihara

IEEE J. Solid State Circuits, 2000