Takao Waho
According to our database1,
Takao Waho
authored at least 52 papers
between 1995 and 2024.
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Bibliography
2024
Delta-Sigma Domain Signal Processing Revisited with Related Topics in Stochastic Computing.
IEICE Trans. Inf. Syst., 2024
2023
Delta-Sigma Domain Signal Processing: A Review with Relevant Topics in Stochastic Computing.
Proceedings of the 53rd IEEE International Symposium on Multiple-Valued Logic, 2023
2021
IEICE Trans. Inf. Syst., 2021
A multi-level cascaded delta-sigma modulator with reduced quantization noise leakage.
Proceedings of the 51st IEEE International Symposium on Multiple-Valued Logic, 2021
A Delta-Sigma-Modulation Multi-Channel Network with Improved Noise-Shaping Characteristics.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
A delta-sigma-modulator feedforward network for a non-binary analog-to-digital converter.
Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020
2018
A Noise-shaping Analog-to-Digital Converter using a ΔΣ Modulator Feedforward Network.
FLAP, 2018
Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018
2017
Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017
2015
Proceedings of the 2015 IEEE International Symposium on Multiple-Valued Logic, 2015
2014
IEICE Trans. Electron., 2014
Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2013
Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013
2012
InAs Nanowire Circuits Fabricated by Field-Assisted Self-Assembly on a Host Substrate.
IEICE Trans. Electron., 2012
Energy Efficiency of Multi-bit delta-sigma Modulators Using Inverter-based Integrators.
Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
IEICE Trans. Electron., 2011
Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011
2010
A Low-Power Successive Approximation Analog-to-Digital Converter Based on 2-Bit/Step Comparison.
Proceedings of the 40th IEEE International Symposium on Multiple-Valued Logic, 2010
Enhancement of comparator operation speed by using negative-differential-resistance devices.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
Proceedings of the ISMVL 2009, 2009
A Bandpass Continuous-time SigmaDelta Modulator using a Parallel-DAC to Reduce Jitter Sensitivity.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IEICE Trans. Electron., 2008
IEICE Trans. Electron., 2008
Proceedings of the 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
IEICE Trans. Electron., 2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
A Design of Continuous-Time Delta-Sigma Modulators Using a Fully-Differential Resonant-Tunneling Comparator.
IEICE Trans. Electron., 2006
A Feedback-Signal Shaping Technique for Multi-Level Continuous-Time Delta-Sigma Modulators with Clock-Jitter.
Proceedings of the 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
A Design of 10-GHz Delta-Sigma Modulator using a 4-Level Differential Resonant-Tunneling Quantizer.
Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2002
An Impact of Introducing Multi-Level Signals to a Bandpass Cascaded Delta-Sigma Modulator.
Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002
2001
Proceedings of the 31st IEEE International Symposium on Multiple-Valued Logic, 2001
2000
Novel Resonant-Tunneling Multiple-Threshold Logic Circuit Based on Switching Sequence Detection.
Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000
1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
1998
Resonant-tunneling diode and HEMT logic circuits with multiple thresholds and multilevel output.
IEEE J. Solid State Circuits, 1998
Proceedings of the 28th IEEE International Symposium on Multiple-Valued Logic, 1998
1997
Application of Resonant-Tunneling Quaternary Quantizer to Ultrahigh-Speed A/D Converter.
Proceedings of the 27th IEEE International Symposium on Multiple-Valued Logic, 1997
1996
Proceedings of the 26th IEEE International Symposium on Multiple-Valued Logic, 1996
1995
Proceedings of the 25th IEEE International Symposium on Multiple-Valued Logic, 1995