Takao Kaneko

According to our database1, Takao Kaneko authored at least 16 papers between 1985 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
The Choice of Communication Media and the Use of Mobile Phone among Senior Users and Young Users.
Proceedings of the Computer-Human Interaction, 8th Asia-Pacific Conference, 2008

2007
Multi-window System and the Working Memory.
Proceedings of the Engineering Psychology and Cognitive Ergonomics, 2007

2005
Quality assessment for extending ITU-T G.729 Annexes.
Syst. Comput. Jpn., 2005

2004
Design of a Robust LSP Quantizer for a High-Quality 4-kbit/s CELP Speech Coder.
IEICE Trans. Inf. Syst., 2004

Noise Post-Processing for Low Bit-Rate CELP Coders.
IEICE Trans. Inf. Syst., 2004

2003
An LPC vocoder based on phase-equalized pitch waveform.
Speech Commun., 2003

Construction of a real-time music delivery system for IMT-2000 using twin VQ.
Syst. Comput. Jpn., 2003

Hierarchical lossless audio coding in terms of sampling rate and amplitude resolution.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2002
Lossless scalable audio coder and quality enhancement.
Proceedings of the IEEE International Conference on Acoustics, 2002

Robust speech coding under packet-loss conditions using recovery sub-codec for broad-band IP network.
Proceedings of the IEEE International Conference on Acoustics, 2002

2001
A real-time IMT-2000 audio transmission system.
IEEE Trans. Consumer Electron., 2001

2000
Card-sized portable audio player using high quality audio coding technology TwinVQ.
IEEE Trans. Consumer Electron., 2000

1990
A Routing System for Mixed A/D Standard Cell LSIs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989
A 17 bit oversampling D-A conversion technology using multistage noise shaping.
IEEE J. Solid State Circuits, August, 1989

1986
A 50ns floating-point signal processor VLSI.
Proceedings of the IEEE International Conference on Acoustics, 1986

1985
An 18-bit floating-point signal processor VLSI with an on-chip 512W dual-port RAM.
Proceedings of the IEEE International Conference on Acoustics, 1985


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