Takafumi Yamaji

According to our database, Takafumi Yamaji authored at least 24 papers between 1996 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

All-Digital Background Calibration Technique for Time-Interleaved ADC Using Pseudo Aliasing Signal.

Junya Matsuno, Takafumi Yamaji, Masanori Furuta, Tetsuro Itakura

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012

A -70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS.

Daisuke Miyashita, Kenichi Agawa, Hirotsugu Kajihara, Kenichi Sami, Masaomi Iwanaga, Yosuke Ogasawara, Tomohiko Ito, Daisuke Kurose, Naotaka Koide, Toru Hashimoto, Hiroki Sakurai, Takafumi Yamaji, Takashi Kurihara, Kazumi Sato, Ichiro Seto, Hiroshi Yoshida, Ryuichi Fujimoto, Yasuo Unekawa

Proceedings of the Symposium on VLSI Circuits, 2012

All-digital background calibration for time-interleaved ADC using pseudo aliasing signal.

Junya Matsuno, Takafumi Yamaji, Masanori Furuta, Tetsuro Itakura

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Harmonic Signal Rejection Schemes of Polyphase Downconverters.

Takafumi Yamaji, Hiroshi Tanimoto, Junya Matsuno, Tetsuro Itakura

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A 570fsrms integrated-jitter ring-VCO-based 1.21GHz PLL with hybrid loop.

Akihide Sai, Takafumi Yamaji, Tetsuro Itakura

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

A Direct Conversion Receiver Adopting Balanced Three-Phase Analog System.

Takafumi Yamaji, Takeshi Ueno, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

2008

1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters.

Takeshi Ueno, Tomohiko Ito, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals.

Akihide Sai, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

55-mW, 1.2-V, 12-bit, 100-MSPS Pipeline ADCs for Wireless Receivers.

Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Electron., 2008

An area-efficient sampling rate converter using negative feedback technique.

Masanori Furuta, Takafumi Yamaji, Takeshi Ueno, Tetsuro Itakura

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS.

Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006

55-mW 200-MSPS 10-bit pipeline ADCs for wireless receivers.

Daisuke Kurose, Tomohiko Ito, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEEE J. Solid State Circuits, 2006

Low-Power Design of 10-bit 80-MSPS Pipeline ADCs.

Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Balanced 3-phase analog signal processing for radio communications.

Takafumi Yamaji, Tetsuro Itakura, Rui Ito, Takeshi Ueno, Hidenori Okuni

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

Nonlinear Analysis of Bipolar Harmonic Mixer for Direct Conversion Receivers.

Hiroshi Tanimoto, Ryuta Ito, Takafumi Yamaji

IEICE Trans. Electron., 2005

A 10-bit, 200-MSPS, 105-mW pipeline A-to-D converter.

Tomohiko Ito, Takeshi Ueno, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Electron. Express, 2005

A 1.2-V, 12-bit, 200M sample/s current-steering D/A converter in 90-nm CMOS.

Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

Capacitance Mismatch Evaluation for Low-power Pipeline ADC Design.

Tomohiko Ito, Takafumi Yamaji, Daisuke Kurose, Tetsuro Itakura

IEICE Electron. Express, 2004

2003

A four-input beam-forming downconverter for adaptive antennas.

Takafumi Yamaji, Daisuke Kurose, Osamu Watanabe, Shuichi Obayashi, Tetsuro Itakura

IEEE J. Solid State Circuits, 2003

2002

A temperature-stable CMOS variable-gain amplifier with 80-dB linearly controlled gain range.

Takafumi Yamaji, Nobuo Kanou, Tetsuro Itakura

IEEE J. Solid State Circuits, 2002

A fourth-order bandpass Δ-Σ modulator using second-order bandpass noise-shaping dynamic element matching.

Takeshi Ueno, Akira Yasuda, Takafumi Yamaji, Tetsuro Itakura

IEEE J. Solid State Circuits, 2002

A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer.

Osamu Watanabe, Takafumi Yamaji, Tetsuro Itakura, Ichiro Hattori

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

1998

An I/Q active balanced harmonic mixer with IM2 cancelers and a 45° phase shifter.

Takafumi Yamaji, Hiroshi Tanimoto, Hideyuki Kokatsu

IEEE J. Solid State Circuits, 1998

1996

A low local input 1.9 GHz Si-bipolar quadrature modulator with no adjustment.

Shoji Otaka, Takafumi Yamaji, Ryuichi Fujimoto, Chikau Takahashi, Hiroshi Tanimoto

IEEE J. Solid State Circuits, 1996