Taiyuan Tseng
According to our database1,
Taiyuan Tseng
authored at least 5 papers
between 2008 and 2019.
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Bibliography
2019
A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2012
128Gb 3b/cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2009
A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology.
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008