Taiji Ema
According to our database1,
Taiji Ema
authored at least 2 papers
between 2013 and 2016.
Collaborative distances:
Collaborative distances:
Timeline
2013
2014
2015
2016
0
1
2
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2016
A 55nm Ultra Low Leakage Deeply Depleted Channel technology optimized for energy minimization in subthreshold SRAM and logic.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2013
Low power ARM® Cortex™-M0 CPU and SRAM using Deeply Depleted Channel (DDC) transistors with Vdd scaling and body bias.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013