Tai-Ji An

According to our database, Tai-Ji An authored at least 6 papers between 2011 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier.

Jun-Sang Park, Tai-Ji An, Gil-Cho Ahn, Seung-Hoon Lee

IEEE Trans. Circuits Syst. II Express Briefs, 2019

2018

Area-Efficient Time-Shared Digital-to-Analog Converter With Dual Sampling for AMOLED Column Driver IC's.

Tai-Ji An, Moon-Sang Hwang, Won-Jun Choe, Gil-Cho Ahn, Seung-Hoon Lee

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2013

Time-Interleaved and Circuit-Shared Dual-Channel 10 b 200 MS/s 0.18 µm CMOS Analog-to-Digital Convertor.

Hyo-Jin Kim, Tai-Ji An, Sungmeen Myung, Seung-Hoon Lee

IEEE Trans. Very Large Scale Integr. Syst., 2013

10b 150MS/s 0.4mm² 45nm CMOS ADC based on process-insensitive amplifiers.

Tai-Ji An, Jun-Sang Park, Yongmin Kim, Suk-Hee Cho, Gil-Cho Ahn, Seung-Hoon Lee

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

A 10b 1MS/s-to-10MS/s 0.11um CMOS SAR ADC for analog TV applications.

Sang-Pil Nam, Yongmin Kim, Dong-Hyun Hwang, Hyo-Jin Kim, Tai-Ji An, Jun-Sang Park, Suk-Hee Cho, Gil-Cho Ahn, Seung-Hoon Lee

Proceedings of the International SoC Design Conference, 2012

2011

A range-scaled 13b 100MS/s 0.13μm CMOS SHA-free ADC based on a single reference.

Dong-Hyun Hwang, Jung-Eun Song, Sang-Pil Nam, Hyo-Jin Kim, Tai-Ji An, Kwang-Soo Kim, Seung-Hoon Lee

Proceedings of the International SoC Design Conference, 2011