Taher Daud
According to our database1,
Taher Daud
authored at least 19 papers
between 1990 and 2008.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2008
Self-Reconfigurable Mixed-Signal Integrated Circuits Architecture Comprising a Field Programmable Analog Array and a General Purpose Genetic Algorithm IP Core.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008
Self-Reconfigurable Analog Array Integrated Circuit Architecture for Space Applications.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
2007
Proceedings of the Evolvable Systems: From Biology to Hardware, 2007
Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
2005
Proceedings of the Artificial Intelligence and Knowledge Engineering Applications: A Bioinspired Approach: First International Work-Conference on the Interplay Between Natural and Artificial Computation, 2005
2004
Proceedings of the IEEE Congress on Evolutionary Computation, 2004
2003
Proceedings of the Artificial Neural Networks and Neural Information Processing, 2003
2001
Reconfigurable VLSI architectures for evolvable hardware: from experimental field programmable transistor arrays to evolution-oriented chips.
IEEE Trans. Very Large Scale Integr. Syst., 2001
2000
Proceedings of the 2nd NASA / DoD Workshop on Evolvable Hardware (EH 2000), 2000
1999
Neurocomputing, 1999
Proceedings of the Foundations and Tools for Neural Modeling, 1999
Cascade error projection with low bit weight quantization for high order correlation data.
Proceedings of the International Joint Conference Neural Networks, 1999
1996
Proceedings of International Conference on Neural Networks (ICNN'96), 1996
Proceedings of International Conference on Neural Networks (ICNN'96), 1996
1995
1992
Analog VLSI neural networks: implementation issues and examples in optimization and supervised learning.
IEEE Trans. Ind. Electron., 1992
Cascaded VLSI neural network chips: Hardware learning for pattern recognition and classification.
Simul., 1992
1991
Neural Networks, 1991
1990
Proceedings of the Visual Communications and Image Processing '90: Fifth in a Series, 1990