Taha Shahroodi

Orcid: 0000-0003-4576-0030

According to our database1, Taha Shahroodi authored at least 33 papers between 2019 and 2024.

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Bibliography

2024
ApHMM: Accelerating Profile Hidden Markov Models for Fast and Energy-efficient Genome Analysis.
ACM Trans. Archit. Code Optim., March, 2024

Computation-in-Memory for Modern Applications using Emerging Technologies.
PhD thesis, 2024

Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems.
CoRR, 2024

Efficient Memory Layout for Pre-Alignment Filtering of Long DNA Reads Using Racetrack Memory.
IEEE Comput. Archit. Lett., 2024

AFSRAM-CIM: Adder Free SRAM-Based Digital Computation-in-Memory for BNN.
Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

High-Performance Data Mapping for BNNs on PCM-Based Integrated Photonics.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
An In-Memory Architecture for High-Performance Long-Read Pre-Alignment Filtering.
CoRR, 2023

Efficient Signed Arithmetic Multiplication on Memristor-Based Crossbar.
IEEE Access, 2023

A Case for Genome Analysis Where Genomes Reside.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

RattlesnakeJake: A Fast and Accurate Pre-alignment Filter Suitable for Computation-in-Memory.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

Swordfish: A Framework for Evaluating Deep Neural Network-based Basecalling using Computation-In-Memory with Non-Ideal Memristors.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

SparseMEM: Energy-efficient Design for In-memory Sparse-based Graph Processing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Lightspeed Binary Neural Networks using Optical Phase-Change Materials.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

SieveMem: A Computation-in-Memory Architecture for Fast and Accurate Pre-Alignment.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022
pLUTo: Enabling Massively Parallel Computation In DRAM via Lookup Tables.
Dataset, July, 2022

BCIM: Efficient Implementation of Binary Neural Network Based on Computation in Memory.
CoRR, 2022

A Case for Transparent Reliability in DRAM Systems.
CoRR, 2022

Demeter: A Fast and Energy-Efficient Food Profiler Using Hyperdimensional Computing in Memory.
IEEE Access, 2022

System Design for Computation-in-Memory: From Primitive to Complex Functions.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

KrakenOnMem: a memristor-augmented HW/SW framework for taxonomic profiling.
Proceedings of the ICS '22: 2022 International Conference on Supercomputing, Virtual Event, June 28, 2022

CIM-based Robust Logic Accelerator using 28 nm STT-MRAM Characterization Chip Tape-out.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
pLUTo: In-DRAM Lookup Tables to Enable Massively Parallel General-Purpose Computation.
CoRR, 2021

BurstLink: Techniques for Energy-Efficient Conventional and Virtual Reality Video Display.
CoRR, 2021

SneakySnake: a fast and accurate universal genome pre-alignment filter for CPUs, GPUs and FPGAs.
Bioinform., 2021

BurstLink: Techniques for Energy-Efficient Video Display for Conventional and Virtual Reality Systems.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Bit-Exact ECC Recovery (BEER): Determining DRAM On-Die ECC Functions by Exploiting DRAM Data Retention Characteristics.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019
Low-Latency Double Point Multiplication Architecture Using Differential Addition Chain Over $GF(2^m)$.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAM.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019


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