Taeyoung Kong
Orcid: 0000-0001-6224-4690
According to our database1,
Taeyoung Kong
authored at least 10 papers
between 2018 and 2024.
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Bibliography
2024
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
IEEE J. Solid State Circuits, March, 2024
Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Proceedings of the 36th IEEE Hot Chips Symposium, 2024
2023
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.
ACM Trans. Embed. Comput. Syst., March, 2023
Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays.
CoRR, 2023
2022
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Proceedings of the Second Conference on Machine Learning and Systems, SysML 2019, 2019
2018