Taesang Cho
Orcid: 0000-0002-1544-4419
According to our database1,
Taesang Cho
authored at least 3 papers
between 2011 and 2013.
Collaborative distances:
Collaborative distances:
Timeline
2011
2012
2013
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1
2
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2013
A High-Speed Low-Complexity Modified <i>Radix</i>-2<sup>5</sup> FFT Processor for High Rate WPAN Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2013
2012
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012
2011
A high-speed low-complexity modified radix-2<sup>5</sup> FFT processor for gigabit WPAN applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011