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Taehee Lee

Affiliations:
  • Sungkyunkwan University, Department of Semiconductor and Display Engineering, Suwon, South Korea (PhD 2017)
  • University of Southern California, Los Angeles, CA, USA (former)


According to our database1, Taehee Lee authored at least 5 papers between 2016 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Clock Network Optimization With Multibit Flip-Flop Generation Considering Multicorner Multimode Timing Constraint.
[BibTeX]
[DOI]
Taehee Lee
,
David Z. Pan
,
Joon-Sung Yang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

2017
Enhancing Test Compression With Dependency Analysis for Multiple Expansion Ratios.
[BibTeX]
[DOI]
Taehee Lee
,
Nur A. Touba
,
Joon-Sung Yang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Physical-aware gating element insertion for thermal-safe scan shift operation.
[BibTeX]
[DOI]
Taehee Lee
,
Joon-Sung Yang
IEICE Electron. Express, 2017

2016
Temperature and voltage droop-aware test scheduling during scan shift operation.
[BibTeX]
[DOI]
Taehee Lee
,
YongJoon Kim
,
Joon-Sung Yang
IEICE Electron. Express, 2016

Multi-bit flip-flop generation considering multi-corner multi-mode timing constraint.
[BibTeX]
[DOI]
Taehee Lee
,
JongWon Yi
,
Joon-Sung Yang
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016


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