Tadeusz Luba
According to our database1,
Tadeusz Luba
authored at least 51 papers
between 1991 and 2022.
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Bibliography
2022
Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022
2020
Comparison of algorithms for dimensionality reduction and their application to index generation functions.
Proceedings of the 15th IEEE International Conference of System of Systems Engineering, 2020
2019
Non-disjoint Decomposition Using r-admissibility and Graph Coloring and Its Application in Index Generation Functions Minimization.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
2015
Comput. Aided Civ. Infrastructure Eng., 2015
Proceedings of the 24th International Workshop on Concurrency, 2015
2014
Proceedings of the Progress in Systems Engineering, 2014
2012
Fixed Polarity Linearly Independent Expansions for the Representation of Quaternary Functions.
J. Multiple Valued Log. Soft Comput., 2012
2011
Int. J. Appl. Math. Comput. Sci., 2011
Proceedings of the 21st International Conference on Systems Engineering (ICSEng 2011), 2011
Proceedings of the Computer Aided Systems Theory - EUROCAST 2011, 2011
2009
Fixed Polarity Quaternary Transforms Derived from Linearly Independent Transform over GF(2) Structure.
Proceedings of the ISMVL 2009, 2009
Decision diagram based computation of linearly independent ternary arithmetic transform spectra.
Proceedings of the 17th European Signal Processing Conference, 2009
Two classes of fixed polarity linearly independent arithmetic transforms for quaternary functions.
Proceedings of the 17th European Signal Processing Conference, 2009
Proceedings of the Computer Aided Systems Theory, 2009
Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009
2008
Properties and Computational Algorithm for Fastest Quaternary Linearly Independent Transforms.
Proceedings of the 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Family of Fastest Linearly Independent Transforms over GF(3): Generation, Relations, and Hardware Implementation.
J. Multiple Valued Log. Soft Comput., 2007
Efficient Algorithm for Calculation of Quaternardy Fixed Polarity Arithmetic Expansions.
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
Properties and relations of new fastest linearly independent arithmetic transforms for ternary functions.
Proceedings of the 15th European Signal Processing Conference, 2007
Cost-Efficient Synthesis for Sequential Circuits Implemented Using Embedded Memory Blocks of FPGAs.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007
2006
Functional Decomposition - the Value and Implication for Both Neural Networks and Digital Designing.
Int. J. Comput. Intell. Appl., 2006
Multilevel Synthesis of Finite State Machines Based on Symbolic Functional Decomposition.
Int. J. Comput. Intell. Appl., 2006
2005
An application of functional decomposition in ROM-based FSM implementation in FPGA devices.
J. Syst. Archit., 2005
Efficient Application of Modern Logic Synthesis in FPGA-Based Designing of Information and Signal Processing Systems.
Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005
Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
2004
A Hybrid Approach to a Classification Problem.
Proceedings of the Intelligent Information Processing and Web Mining, 2004
2003
J. Multiple Valued Log. Soft Comput., 2003
NOAH, a tool for argument reduction, serial and parallel decomposition of decision tables.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
2002
FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition.
Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002
2001
Functional decomposition with an efficient input support selection for sub-functions based on information relationship measures.
J. Syst. Archit., 2001
Functional Decomposition and Its Applications in Machine Learning and Neural Networks.
Int. J. Comput. Intell. Appl., 2001
2000
Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
1999
Technology Driven Multilevel Logic Synthesis Based on Functional Decomposition into Gates.
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Efficient Input Support Selection for Sub-functions in Functional Decomposition Based on Information Relationship Measures.
Proceedings of the 25th EUROMICRO '99 Conference, 1999
The Influence of the Number of Values in Sub-Functions on the Effectiveness and Efficiency of the Functional Decomposition.
Proceedings of the 25th EUROMICRO '99 Conference, 1999
1998
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998
Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure.
Proceedings of the 24th EUROMICRO '98 Conference, 1998
1997
Proceedings of the 27th IEEE International Symposium on Multiple-Valued Logic, 1997
Cube Diagram Bundles: A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations.
Proceedings of the 27th IEEE International Symposium on Multiple-Valued Logic, 1997
1995
A General Approach to Boolean Function Decomposition and its Application in FPGABased Synthesis.
VLSI Design, 1995
Proceedings of the 25th IEEE International Symposium on Multiple-Valued Logic, 1995
Proceedings of the 1995 European Design and Test Conference, 1995
1994
1993
An Implementation of Decomposition Algorithm and its Application in Information System Analysis and Logic Synthesis.
Proceedings of the Rough Sets, 1993
1992
Proceedings of the conference on European design automation, 1992
Proceedings of the Intelligent Decision Support, 1992
1991
Proceedings of the conference on European design automation, 1991