Tadatoshi Sekine
Orcid: 0000-0003-1813-822X
According to our database1,
Tadatoshi Sekine
authored at least 6 papers
between 2008 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
2008
2010
2012
2014
2016
2018
2020
2022
0
1
2
1
1
1
1
1
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
2014
HIE-block latency insertion method for fast transient simulation of nonuniform multiconductor transmission lines.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Unconditionally stable explicit method for the fast 3-D simulation of on-chip power distribution network with through silicon via.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
Predictor-corrector latency insertion method for fast transient analysis of ill-constructed circuits.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
2008
Matrix Order Reduction by Nodal Analysis Formulation and Relaxation-Based Fast Simulation for Power/Ground Plane.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008