Tadashi Teranuma

According to our database, Tadashi Teranuma authored at least 2 papers between 2009 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

A 342 mW Mobile Application Processor With Full-HD Multi-Standard Video Codec and Tile-Based Address-Translation Circuits.

Kenichi Iwata, Takahiro Irita, Seiji Mochizuki, Hiroshi Ueda, Masakazu Ehama, Motoki Kimura, Jun Takemura, Keiji Matsumoto, Eiji Yamamoto, Tadashi Teranuma, Katsuji Takakubo, Hiromi Watanabe, Shinichi Yoshioka, Toshihiro Hattori

IEEE J. Solid State Circuits, 2010

2009

A 342mW mobile application processor with full-HD multi-standard video codec.

Kenichi Iwata, Takahiro Irita, Seiji Mochizuki, Hiroshi Ueda, Masakazu Ehama, Motoki Kimura, Jun Takemura, Keiji Matsumoto, Eiji Yamamoto, Tadashi Teranuma, Katsuji Takakubo, Hiromi Watanabe, Shinichi Yoshioka, Toshihiro Hattori

Proceedings of the IEEE International Solid-State Circuits Conference, 2009