Tadashi Shibata
According to our database1,
Tadashi Shibata
authored at least 102 papers
between 1993 and 2016.
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Bibliography
2016
A Nearest Neighbor Classifier Employing Critical Boundary Vectors for Efficient On-Chip Template Reduction.
IEEE Trans. Neural Networks Learn. Syst., 2016
2014
A Real-Time Motion-Feature-Extraction VLSI Employing Digital-Pixel-Sensor-Based Parallel Architecture.
IEEE Trans. Circuits Syst. Video Technol., 2014
Unsupervised Object Extraction by Contour Delineation and Texture Discrimination Based on Oriented Edge Features.
IEEE Trans. Circuits Syst. Video Technol., 2014
A single-chip 600-fps real-time action recognition system employing a hardware friendly algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
A Directional-Edge-Based Real-Time Object Tracking System Employing Multiple Candidate-Location Generation.
IEEE Trans. Circuits Syst. Video Technol., 2013
A hardware friendly algorithm for action recognition using spatio-temporal motion-field patches.
Neurocomputing, 2013
A multiple-candidate-regeneration-based object tracking system with enhanced learning capability by nearest neighbor classifier.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
A VLSI DBSCAN processor composed as an array of micro agents having self-growing interconnects.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
An MTJ-based nonvolatile associative memory architecture with intelligent power-saving scheme for high-speed low-power recognition applications.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
A real-time motion-feature-extraction image processor employing digital-pixel-sensor-based parallel architecture.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Self-adaptive quasi-Gaussian circuits for analog on-chip-trainable multi-class classifiers.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Translation-invariant motion perception for multiple objects using grid partitioning representation.
Proceedings of the 6th International Conference on Signal Processing and Communication Systems, 2012
Scene image recognition based on the sequence of local image vectors represented by oriented edges.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012
Real-Time Object Tracking Algorithm Employing On-Line Support Vector Machine and Multiple Candidate Regeneration.
Proceedings of the Artificial Intelligence and Soft Computing, 2012
Real-Time On-Line-Learning Support Vector Machine Based on a Fully-Parallel Analog VLSI Processor.
Proceedings of the Artificial Intelligence and Soft Computing, 2012
A Hierarchical Action Recognition System Applying Fisher Discrimination Dictionary Learning via Sparse Representation.
Proceedings of the Artificial Intelligence and Soft Computing, 2012
Unsupervised object extraction by contour delineation and texture-based discrimination.
Proceedings of the 20th European Signal Processing Conference, 2012
2011
A vertical-MOSFET-based digital core circuit for high-speed low-power vector matching.
Proceedings of the International SoC Design Conference, 2011
Critical Boundary Vector Concept in Nearest Neighbor Classifiers using k-Means Centers for Efficient Template Reduction.
Proceedings of the NCTA 2011, 2011
A dominant-noise discrimination system for images corrupted by content-independent noises without a priori references.
Proceedings of the 5th International Conference on Signal Processing and Communication Systems, 2011
Spatio-temporal motion field descriptors for the hierarchical action recognition system.
Proceedings of the 5th International Conference on Signal Processing and Communication Systems, 2011
2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A Neuron-MOS-Based VLSI Implementation of Pulse-Coupled Neural Networks for Image Feature Generation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
An Ego-Motion Detection System Employing Directional-Edge-Based Motion Field Representations.
IEICE Trans. Inf. Syst., 2010
Block-matching-based motion field generation utilizing directional edge displacement.
Comput. Electr. Eng., 2010
Directional-edge-based object tracking employing on-line learning and regeneration of multiple candidate locations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
A row-parallel cyclic-line-access edge detection CMOS image sensor employing global thresholding operation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
A self-learning multiple-class classifier using multi-dimensional quasi-Gaussian analog circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain Techniques.
Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010
2009
A Pixel-Parallel Self-Similitude Processing for Multiple-Resolution Edge-Filtering Analog Image Sensors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
A Computational Digital Pixel Sensor Featuring Block-Readout Architecture for On-Chip Image Processing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
A low-power switched-current CDMA matched filter employing MOS linear matching cell with on-chip A/D converter.
Integr., 2009
A Real-time Image Feature Vector Generator Employing Functional Cache Memory for Edge Flags.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Block-matching-based CMOS Optical Flow Sensor using Only-nearest-neighbor Computation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
A Single-motion-vector/Cycle-generation Optical Flow Processor Employing Directional-edge Histogram Matching.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Normalized scoring of Hidden Markov Models by on-line learning and its application to gesture-sequence perception.
Proceedings of the International Conference on Image Processing, 2009
A Non-subtraction Configuration of Self-similitude Architecture for Multiple-Resolution Edge-Filtering CMOS Image Sensor.
Proceedings of the Artificial Neural Networks, 2009
A real-time image recognition system using a global directional-edge-feature extraction VLSI processor.
Proceedings of the 35th European Solid-State Circuits Conference, 2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2008
IEICE Trans. Electron., 2008
An analog self-similitude edge-filtering processor for multiple-resolution image perception.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Spatiotemporal projection of motion field sequence for generating feature vectors in gesture perception.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the IEEE International Conference on Acoustics, 2008
2007
A Real-Time Image-Feature-Extraction and Vector-Generation VLSI Employing Arrayed-Shift-Register Architecture.
IEEE J. Solid State Circuits, 2007
A Low-Power Floating-Gate-MOS-Based CDMA Matched Filter Featuring Coupling Capacitor Disconnection.
IEEE J. Solid State Circuits, 2007
An Intelligent Action Control System Based on Extended Vector Annotated Logic Program and its Hardware Implementation.
Intell. Autom. Soft Comput., 2007
A Real-Time Learning Processor Based on K-means Algorithm with Automatic Seeds Generation.
Proceedings of the International Symposium on System-on-Chip, 2007
Mixed-Signal Focal-Plane Image Processor Employing Tme-domaiin Computation Architecture.
Proceedings of the International Symposium on System-on-Chip, 2007
A Feature-Based Optical Flow Processor Architecture Featuring Single-Motion-Vector/Cycle Generation.
Proceedings of the International Symposium on System-on-Chip, 2007
Validating directional edge-based image feature representations in face recognition by spatial correlation-based clustering.
Proceedings of the 15th European Signal Processing Conference, 2007
A speed adaptive ego-motion detection system using EDGE-histograms produced by variable graduation method.
Proceedings of the 15th European Signal Processing Conference, 2007
2006
Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A Vlsi-Implementation-Friendly EGO-Motion Detection Algorithm Based on Edge-Histogram Matching.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
Illumination-invariant face identification using edge-based feature vectors in pseudo-2D Hidden Markov Models.
Proceedings of the 14th European Signal Processing Conference, 2006
Proceedings of the 14th European Signal Processing Conference, 2006
2005
IEEE J. Solid State Circuits, 2005
A delay-encoding-logic array processor for dynamic-programming matching of data sequences.
IEEE J. Solid State Circuits, 2005
An Analog Visual Pre-Processing Processor Employing Cyclic Line Access in Only-Nearest-Neighbor-Interconnects Architecture.
Proceedings of the Advances in Neural Information Processing Systems 18 [Neural Information Processing Systems, 2005
A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Multiple-resolution edge-based feature representations for robust face segmentation and verification.
Proceedings of the 13th European Signal Processing Conference, 2005
A new distance measure employing element-significance factors for robust image classification.
Proceedings of the 13th European Signal Processing Conference, 2005
A high-speed median filter VLSI using floating-gate-MOS-based low-power majority voting circuits.
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
A real-time VLSI median filter employing two-dimensional bit-propagating architecture.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004
An edge-based face detection algorithm robust against illumination, focus, and scale variations.
Proceedings of the 2004 12th European Signal Processing Conference, 2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
2003
IEEE Trans. Neural Networks, 2003
An image representation algorithm compatible with neural-associative-processor-based hardware recognition systems.
IEEE Trans. Neural Networks, 2003
IEEE Trans. Neural Networks, 2003
IEEE J. Solid State Circuits, 2003
A Robust Medical Image Recognition System Employing Edge-Based Feature Vector Representation.
Proceedings of the Image Analysis, 13th Scandinavian Conference, 2003
Proceedings of the Advances in Neural Information Processing Systems 16 [Neural Information Processing Systems, 2003
Speaker and text independent language identification using predictive error histogram vectors.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003
Proceedings of the ESSCIRC 2003, 2003
2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
Proceedings of the 2002 Symposium on Applications and the Internet (SAINT 2002), 28 January, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
An associative-processor-based mixed signal system for robust grayscale image recognition.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A motion-based analog VLSI saliency detector using quasi-two-dimensional hardware algorithm.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A human-perception-like image recognition system based on PAP vector representation with multi resolution concept.
Proceedings of the IEEE International Conference on Acoustics, 2002
Human-perception-like image recognition system based on the Associative Processor architecture.
Proceedings of the 11th European Signal Processing Conference, 2002
2001
A fast self-convergent flash-memory programming scheme for MV and analog data storage.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
Proceedings of the 10th European Signal Processing Conference, 2000
1999
A fully parallel vector-quantization processor for real-time motion-picture compression.
IEEE J. Solid State Circuits, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
CMOS charge-transfer preamplifier for offset-fluctuation cancellation in low-power A/D converters.
IEEE J. Solid State Circuits, 1998
Proceedings of the Knowledge-Based Intelligent Electronic Systems, 1998
Proceedings of the Knowledge-Based Intelligent Electronic Systems, 1998
Proceedings of the 28th IEEE International Symposium on Multiple-Valued Logic, 1998
1996
Implementing Intelligence in Silicon Integrated Circuits Using Neuron-Like High-Functionality Transistors.
J. Robotics Mechatronics, 1996
1995
IEEE J. Solid State Circuits, August, 1995
Proceedings of the Advances in Neural Information Processing Systems 8, 1995
1993
Proceedings of the Advances in Neural Information Processing Systems 6, 1993