Tadahiko Nishimukai

According to our database, Tadahiko Nishimukai authored at least 5 papers between 1988 and 1994.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

1994

Hitachi-PA/50, SH Series Microcontroller.

Tadahiko Nishimukai

Proceedings of the 31st Conference on Design Automation, 1994

1991

On-Chip Multiple Superscalar Processors with Secondary Cache Memories.

M. Hanawa, Tadahiko Nishimukai, O. Nishii, Masato Suzuki, K. Yano, M. Hiraki, S. Shukuri, T. Nishida

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1989

Aliasing Probabilities and Weight Distributions of Several Codes.

Kazuhiko Iwasaki, Tadahiko Nishimukai

Syst. Comput. Jpn., 1989

1988

Realization of Gmicro/200.

Hideo Inayoshi, Ikuya Kawasaki, Tadahiko Nishimukai, Ken Sakamura

IEEE Micro, 1988

Cache-based pipeline architecture in the Hitachi H32/200 32-bit microprocessor.

Tadahiko Nishimukai, Hideo Inayoshi, Kikuko Takagi, Kazuhiko Iwasaki, Ikuya Kawasaki, M. Hanawa, Takeshi Okada

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988