Tadaaki Bandoh

According to our database, Tadaaki Bandoh authored at least 14 papers between 1982 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2002

Cost-effective streaming server implementation using Hi-tactix.

Damien Le Moal, Tadashi Takeuchi, Tadaaki Bandoh

Proceedings of the 10th ACM International Conference on Multimedia 2002, 2002

1994

A 120-MHz BiCMOS superscalar RISC processor.

Shigeya Tanaka, Takashi Hotta, Fumio Murabayashi, Hiromichi Yamada, Shoji Yoshida, Kotaro Shimamura, Koyo Katsura, Tadaaki Bandoh, Koichi Ikeda, Kenji Matsubara, Kouji Saitou, Tetsuo Nakano, Teruhisa Shimizu, Ryuichi Satomura

IEEE J. Solid State Circuits, April, 1994

3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor.

Fumio Murabayashi, Takashi Hotta, Shigeya Tanaka, Tatsumi Yamauchi, Hiromichi Yamada, Tetsuo Nakano, Yutaka Kobayashi, Tadaaki Bandoh

IEEE J. Solid State Circuits, March, 1994

1992

Archimedes: An Approach to Architecutre-Independent Modeling for High-Level Simulation.

Miyako Odawara, Kazunori Kuriyama, Tadaaki Bandoh

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1990

A 70-MHz 32-b microprocessor with 1.0- mu m BiCMOS macrocell library.

Takashi Hotta, Tadaaki Bandoh, Atsuo Hotta, Tetsuo Nakano, Shoji Iwamoto, Shigemi Adachi

IEEE J. Solid State Circuits, June, 1990

1989

A high performance BiCMOS 32-bit microprocessor.

Yasuhiro Nakatsuka, Takashi Hotta, Shigeya Tanaka, Tadaaki Bandoh, Ryuichi Satomura, Syuichi Nakagami, Tetsuo Nakano, Atsuo Hotta, Takashi Moriyama, Shigemi Adachi, Shoji Iwamoto

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

Circuit technologies for BiCMOS VLSI's as computer elements.

Hideo Maejima, Tadaaki Bandoh, Yoji Nishio, Tadashi Fukushima, Masanori Odaka, Atsuo Hotta

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1988

1.3- mu m CMOS/bipolar standard cell library for VLSI computers.

Takashi Hotta, Kouzaburou Kurita, Hideo Maejima, Masahiro Iwamura, Shigeya Tanaka, Tadaaki Bandoh, Tatsumi Yamauchi, Atsuo Hotta

IEEE J. Solid State Circuits, April, 1988

Instruction Architecture for a High Performance Integrated Prolog Processor IPP.

Ken-ichi Kurosawa, S. Yamaguchi, Shigeo Abe, Tadaaki Bandoh

Proceedings of the Logic Programming, 1988

1987

High Performance Integrated Prolog Processor IPP.

Shigeo Abe, Tadaaki Bandoh, S. Yamaguchi, Ken-ichi Kurosawa, Kaori Kiriyama

Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, 1987

Architecture of high performance integrated Prolog processor IPP.

S. Yamaguchi, Tadaaki Bandoh, K. Kurosawa, M. Morioka

Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow, 1987

1985

A high-performance architecture for variable length instructions.

Hidekazu Matsumoto, Tadaaki Bandoh, Kotaro Hirasawa, Takeshi Kato

Syst. Comput. Jpn., 1985

1982

Performance Analysis of Bus Structure in a Multiprocessor System.

Yasushi Fukunaga, Tadaaki Bandoh, Kotaro Hirasawa, Tetsuya Kawakami, Takeshi Kato, Jushi Ide Hitachi

Proceedings of the COMPCON'82, 1982

Preliminary Performance Evaluation of Data Flow Computers.

Shigeo Abe, Ryosei Hiraoka, Yasushi Fukunaga, Tadaaki Bandoh, Kotaro Hirasawa, Yukio Kawamoto

Proceedings of the COMPCON'82, 1982