T. Wieja

According to our database1, T. Wieja authored at least 1 paper in 2000.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2000
Embedded Systems Verification with FPGA-Enhanced In-Circuit Emulator.
Proceedings of the 13th International Symposium on System Synthesis, 2000


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