T. Nandha Kumar

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Approximate Computing in Image Compression and Denoising.

[BibT_eX]

[DOI]

Junqi Huang

Proceedings of the Approximate Computing, 2022

2021

Commutative Approximate Adders: Analysis and Evaluation.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

Generic Expressions for Early Estimation of Performance of Binary Multipliers.

[BibT_eX]

[DOI]

Junqi Huang

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence in Engineering and Technology, 2021

2020

Analytical modelling of tantalum/titanium oxide-based multi-layer selector to eliminate sneak path current in RRAM arrays.

[BibT_eX]

[DOI]

Arya Lekshmi Jagath

Kochupurackal Balakrishna Pillai Jinesh

IET Circuits Devices Syst., 2020

2019

A Deterministic Low-Complexity Approximate (Multiplier-Less) Technique for DCT Computation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Electrical model of multi-level bipolar Ta2O5/TaOx Bi-layered ReRAM.

[BibT_eX]

[DOI]

Hock Leong Chee

Microelectron. J., 2019

Approximate computing using frequency upscaling.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2019

2018

Approximate DCT Image Compression Using Inexact Computing.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2018

Modeling of Current Conduction during RESET Phase of Pt/Ta2O5/TaOx/Pt Bipolar Resistive RAM Devices.

[BibT_eX]

[DOI]

Arya Lekshmi Jagath

Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018

Multifilamentary Conduction Modelling of Bipolar Ta2O5/TaOx Bi-Layered RRAM.

[BibT_eX]

[DOI]

Hock Leong Chee

Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018

2017

Phase change memory cell emulator circuit design.

[BibT_eX]

[DOI]

Nemat H. El-Hassan

Microelectron. J., 2017

Configurable memristive logic block for memristive-based FPGA architectures.

[BibT_eX]

[DOI]

Patrick W. C. Ho

Integr., 2017

Simulation-based evaluation of frequency upscaled operation of exact/approximate ripple carry adders.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016

A SPICE Model of the Ta2O5TaOx Bi-Layered RRAM.

[BibT_eX]

[DOI]

Firas Odai Hatem

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Implementation of time-aware sensing technique for multilevel phase change memory cell.

[BibT_eX]

[DOI]

Nemat H. El-Hassan

Microelectron. J., 2016

Design of a memristor-based look-up table (LUT) for low-energy operation of FPGAs.

[BibT_eX]

[DOI]

Integr., 2016

Design and evaluation of a memristor-based look-up table for non-volatile field programmable gate arrays.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2016

Current-Based Testing, Modeling and Monitoring for Operational Deterioration of a Memristor-Based LUT.

[BibT_eX]

[DOI]

J. Electron. Test., 2016

Inexact designs for approximate low power addition by cell replacement.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Operational fault detection and monitoring of a memristor-based LUT.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Scalable Application-Dependent Diagnosisof Interconnects of SRAM-Based FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

A memristor-based LUT for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2014

Lyapunov method for unperturbed double integrator systems.

[BibT_eX]

[DOI]

W. Jang

Proceedings of the 13th International Conference on Control Automation Robotics & Vision, 2014

A Lyapunov method analysis for double integrator with bounded perturbation.

[BibT_eX]

[DOI]

W. Jang

Proceedings of the 13th International Conference on Control Automation Robotics & Vision, 2014

A novel design of a memristor-based look-up table (LUT) for FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

Multilevel phase change memory cell model.

[BibT_eX]

[DOI]

Nemat H. El-Hassan

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013

A Novel Heuristic Method for Application-Dependent Testing of a SRAM-Based FPGA Interconnect.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Fine grain faults diagnosis of FPGA interconnect.

[BibT_eX]

[DOI]

New Chin-Ee

Microprocess. Microsystems, 2013

Single-configuration fault detection in applicationdependent testing of field programmable gate array interconnects.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2013

On the improved implementations of pre calculated sums of partial products based 7-bit unsigned parallel squarer.

[BibT_eX]

[DOI]

Hassan Ali

Proceedings of the 26th IEEE Canadian Conference on Electrical and Computer Engineering CCECE 2013, 2013

2012

Locating faults in application-dependent interconnects of SRAM based FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

On the multiple fault detection of a nano crossbar.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

2011

A Single-Configuration Method for Application-Dependent Testing of SRAM-based FPGA Interconnects.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2008

An automated approach for locating multiple faulty LUTs in an FPGA.

[BibT_eX]

[DOI]