T. Nakano
According to our database1,
T. Nakano
authored at least 3 papers
between 2006 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
2006
2008
2010
2012
2014
2016
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2020
2022
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2023
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm<sup>2</sup> bit density with 3.2Gbps interface and 205MB/s program throughput.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2016
2006
J. Vis., 2006