T. M. Mak
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2020
High-speed I/O capabilities added to military automatic test equipment (ATE) using synthetic instruments.
IEEE Instrum. Meas. Mag., 2020
2017
ACM Trans. Design Autom. Electr. Syst., 2017
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
2014
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Proceedings of the 2014 International Test Conference, 2014
2013
Measurement of envelope/phase path delay skew and envelope path bandwidth in polar transmitters.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013
2012
Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint.
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Computers, 2012
2011
Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation High Performance Microprocessors.
IEEE Trans. Very Large Scale Integr. Syst., 2011
2010
On-die Ring Oscillator Based Measurement Scheme for Process Parameter Variations and Clock Jitter.
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
2009
Proceedings of the 2009 IEEE International Test Conference, 2009
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
2008
Proceedings of the 2008 IEEE International Test Conference, 2008
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008
2007
IEEE Trans. Computers, 2007
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Data Recovery Block Design for Impulse Modulated Power Line Communications in a Microprocessor.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Proceedings of the 16th Asian Test Symposium, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
IEEE Des. Test Comput., 2006
Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006
2005
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005
2004
Implications of Clock Distribution Faults and Issues with Screening Them during Manufacturing Testing.
IEEE Trans. Computers, 2004
IEEE Des. Test Comput., 2004
IEEE Des. Test Comput., 2004
Proceedings of the 12th IEEE International Workshop on Memory Technology, 2004
Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
Fault secureness need for next generation high performance microprocessor design for testability structures.
Proceedings of the First Conference on Computing Frontiers, 2004
2003
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Clock Calibration Faults and their Impact on Quality of High Performance Microprocessors.
Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003
Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models.
Proceedings of the 40th Design Automation Conference, 2003
2002
Clock Faults? Impact on Manufacturing Testing and Their Possible Detection Through On-Line Testing.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002
2001
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001
1998
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998