T. K. Priya

According to our database, T. K. Priya authored at least 6 papers between 2004 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2007

A Hardware Accelerator and FPGA Realization for Reduced Visibility Graph Construction Using Efficient Bit Representations.

K. Sridharan, T. K. Priya

IEEE Trans. Ind. Electron., 2007

2006

A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects.

T. K. Priya, K. Sridharan

Microprocess. Microsystems, 2006

A hardware-efficient scheme and FPGA realization for computation of single pair shortest path for a mobile automaton.

T. K. Priya, P. Rajesh Kumar, K. Sridharan

Microprocess. Microsystems, 2006

2005

The Design of a Hardware Accelerator for Real-Time Complete Visibility Graph Construction and Efficient FPGA Implementation.

K. Sridharan, T. K. Priya

IEEE Trans. Ind. Electron., 2005

2004

A parallel algorithm for constructing reduced visibility graph and its FPGA implementation.

K. Sridharan, T. K. Priya

J. Syst. Archit., 2004

An Efficient Algorithm to Construct Reduced Visibility Graph and Its FPGA Implementation.

T. K. Priya, K. Sridharan

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004