Szu-Pang Mu

According to our database, Szu-Pang Mu authored at least 6 papers between 2010 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

DVFS Binning Using Machine-Learning Techniques.

Keng-Wei Chang, Chun-Yang Huang, Szu-Pang Mu, Jian-Min Huang, Shi-Hao Chen, Mango C.-T. Chao

Proceedings of the IEEE International Test Conference in Asia, 2018

2017

Generating Routing-Driven Power Distribution Networks With Machine-Learning Technique.

Wen-Hsiang Chang, Chien-Hsueh Lin, Szu-Pang Mu, Li-De Chen, Cheng-Hong Tsai, Yen-Chih Chiu, Mango C.-T. Chao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016

Statistical Framework and Built-In Self-Speed-Binning System for Speed Binning Using On-Chip Ring Oscillators.

Szu-Pang Mu, Mango C.-T. Chao, Shi-Hao Chen, Yi-Ming Wang

IEEE Trans. Very Large Scale Integr. Syst., 2016

Statistical methodology to identify optimal placement of on-chip process monitors for predicting fmax.

Szu-Pang Mu, Wen-Hsiang Chang, Mango C.-T. Chao, Yi-Ming Wang, Ming-Tung Chang, Min-Hsiu Tsai

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2010

Theoretical analysis for low-power test decompression using test-slice duplication.

Szu-Pang Mu, Mango Chia-Tso Chao

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs.

Szu-Pang Mu, Yi-Ming Wang, Hao-Yu Yang, Mango Chia-Tso Chao, Shi-Hao Chen, Chih-Mou Tseng, Tsung-Ying Tsai

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010