Syed M. Alam

According to our database, Syed M. Alam authored at least 32 papers between 2002 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Adiabatic/MTJ-Based Physically Unclonable Function for Consumer Electronics Security.

Zachary Kahleifeh, Himanshu Thapliyal, Syed M. Alam

IEEE Trans. Consumer Electron., February, 2023

2022

Persistent xSPI STT-MRAM with up to 400MB/s Read and Write Throughput.

Syed M. Alam, Dimitri Houssameddine, F. Neumeyer, I. Rahman, M. DeHerrera, S. Ikegawa, P. Sanchez, X. Zhang, Y. Wang, J. Williams, Dietmar Gogl, H. Xu, M. Farook, D. Aceves, H. K. Lee, Fred B. Mancoff, M. Chou, CH. Tan, B. Huang, S. Mukherjee, M. Lu, A. Shah, K. Nagel, Y. Kim, S. Aggarwal

Proceedings of the IEEE International Memory Workshop, 2022

2021

Commercialization of 1Gb Standalone Spin-Transfer Torque MRAM.

J. J. Sun, M. DeHerrera, B. Hughes, S. Ikegawa, H. K. Lee, Fred B. Mancoff, K. Nagel, G. Shimon, Syed M. Alam, D. Houssameddine, S. Aggarwal

Proceedings of the IEEE International Memory Workshop, 2021

2014

STT-Based Non-Volatile Logic-in-Memory Framework.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

Proceedings of the Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives, 2014

Nano Magnetic STT-Logic Partitioning for Optimum Performance.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

IEEE Trans. Very Large Scale Integr. Syst., 2014

2013

Welcome to ISQED 2013.

Mark M. Budnik, Rasit Onur Topaloglu, Pallab Chatterjee, Keith A. Bowman, Kamesh V. Gadepally, Paul Wesling, Syed M. Alam, Rajiv V. Joshi

Proceedings of the International Symposium on Quality Electronic Design, 2013

ST-MRAM fundamentals, challenges, and applications.

Thomas W. Andre, Syed M. Alam, Dietmar Gogl, C. K. Subramanian, Hal Lin, W. Meadows, X. Zhang, Nicholas D. Rizzo, Jason Janesky, D. Houssameddine, Jon M. Slaughter

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Ultra-Low Power Hybrid CMOS-Magnetic Logic Architecture.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Non-destructive variability tolerant differential read for non-volatile logic.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011

Power Delivery Design for 3-D ICs Using Different Through-Silicon Via (TSV) Technologies.

Nauman H. Khan, Syed M. Alam, Soha Hassoun

IEEE Trans. Very Large Scale Integr. Syst., 2011

Maximum error modeling for fault-tolerant computation using maximum a posteriori (MAP) hypothesis.

Karthikeyan Lingasubramanian, Syed M. Alam, Sanjukta Bhanja

Microelectron. Reliab., 2011

Thermal-electrical co-optimisation of floorplanning of three-dimensional integrated circuits under manufacturing and physical design constraints.

Ankur Jain, Syed M. Alam, Scott Pozder, Robert E. Jones

IET Comput. Digit. Tech., 2011

Low Power Magnetic Quantum Cellular Automata Realization Using Magnetic Multi-Layer Structures.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

Mitigating TSV-induced substrate noise in 3-D ICs using GND plugs.

Nauman H. Khan, Syed M. Alam, Soha Hassoun

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2010

Interstratum Connection Design Considerations for Cost-Effective 3-D System Integration.

Syed M. Alam, Robert E. Jones, Scott Pozder, Ritwik Chatterjee, Shahid Rauf, Ankur Jain

IEEE Trans. Very Large Scale Integr. Syst., 2010

Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits.

Ioannis Savidis, Syed M. Alam, Ankur Jain, Scott Pozder, Robert E. Jones, Ritwik Chatterjee

Microelectron. J., 2010

BIST to Detect and Characterize Transient and Parametric Failures.

Alodeep Sanyal, Syed M. Alam, Sandip Kundu

IEEE Des. Test Comput., 2010

2009

Study of Circuit-Specific Error Bounds for Fault-Tolerant Computation using Maximum a posteriori (MAP) Hypothesis

Karthikeyan Lingasubramanian, Syed M. Alam, Sanjukta Bhanja

CoRR, 2009

Die/wafer stacking with reciprocal design symmetry (RDS) for mask reuse in three-dimensional (3D) integration technology.

Syed M. Alam, Robert E. Jones, Scott Pozder, Ankur Jain

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

System-level comparison of power delivery design for 2D and 3D ICs.

Nauman H. Khan, Syed M. Alam, Soha Hassoun

Proceedings of the IEEE International Conference on 3D System Integration, 2009

Through-Silicon Via (TSV)-induced noise characterization and noise mitigation using coaxial TSVs.

Nauman H. Khan, Syed M. Alam, Soha Hassoun

Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008

A 180 Kbit Embeddable MRAM Memory Module.

Joseph J. Nahas, Thomas W. Andre, Brad Garni, Chitra K. Subramanian, Hal Lin, Syed M. Alam, Ken Papworth, William L. Martino

IEEE J. Solid State Circuits, 2008

A Built-In Self-Test Scheme for Soft Error Rate Characterization.

Alodeep Sanyal, Syed M. Alam, Sandip Kundu

Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

Technology, CAD tools, and designs for emerging 3D integration technology.

Syed M. Alam, Mike Ignatowski, Yuan Xie

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2007

Reliability computer-aided design tool for full-chip electromigration analysis and comparison with different interconnect metallizations.

Syed M. Alam, Chee Lip Gan, Carl V. Thompson, Donald E. Troxel

Microelectron. J., 2007

Inter-Strata Connection Characteristics and Signal Transmission in Three-Dimensional (3D) Integration Technology.

Syed M. Alam, Robert E. Jones, Shahid Rauf, Ritwik Chatterjee

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

A 180 Kbit Embeddable MRAM Memory Module.

Joseph J. Nahas, Thomas W. Andre, Chitra K. Subramanian, Hal Lin, Syed M. Alam, Ken Papworth, William L. Martino

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2005

Electromigration Reliability Comparison of Cu and Al Interconnects.

Syed M. Alam, Frank L. Wei, Chee Lip Gan, Carl V. Thompson, Donald E. Troxel

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Thermal aware cell-based full-chip electromigration reliability analysis.

Syed M. Alam, Donald E. Troxel, Carl V. Thompson

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004

Design tool and methodologies for interconnect reliability analysis in integrated circuits.

Syed M. Alam

PhD thesis, 2004

Circuit Level Reliability Analysis of Cu Interconnects.

Syed M. Alam, Chee Lip Gan, Carl V. Thompson, Donald E. Troxel

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

2002

A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits.

Syed M. Alam, Donald E. Troxel, Carl V. Thompson

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002