Swetaki Chatterjee

Orcid: 0000-0002-2550-9626

According to our database1, Swetaki Chatterjee authored at least 7 papers between 2022 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Cross-Layer Reliability Modeling of Dual-Port FeFET: Device-Algorithm Interaction.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023

FerroCoin: Ferroelectric Tunnel Junction-Based True Random Number Generator.
IEEE Trans. Emerg. Top. Comput., 2023

Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET.
CoRR, 2023

2022
Asymmetric Double-Gate Ferroelectric FET to Decouple the Tradeoff Between Thickness Scaling and Memory Window.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Cross-layer FeFET Reliability Modeling for Robust Hyperdimensional Computing.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

A Novel Approach to Mitigate Power Side-Channel Attacks for Emerging Negative Capacitance Transistor Technology.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Novel FDSOI-based Dynamic XNOR Logic for Ultra-Dense Highly-Efficient Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022


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