Swetaki Chatterjee
Orcid: 0000-0002-2550-9626
According to our database1,
Swetaki Chatterjee
authored at least 7 papers
between 2022 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023
IEEE Trans. Emerg. Top. Comput., 2023
Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET.
CoRR, 2023
2022
Asymmetric Double-Gate Ferroelectric FET to Decouple the Tradeoff Between Thickness Scaling and Memory Window.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022
A Novel Approach to Mitigate Power Side-Channel Attacks for Emerging Negative Capacitance Transistor Technology.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022