Swatilekha Majumdar
Orcid: 0000-0002-9116-0215
According to our database1,
Swatilekha Majumdar
authored at least 8 papers
between 2017 and 2023.
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Bibliography
2023
Evaluating the Effects of FeFET Device Variability on Charge Sharing Based AiMC Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
CAWPR: Contention Aware Write Preemptive Management Policy for Hybrid Last Level Caches.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
2021
Single Bit-Line Differential Sensing Based Real-Time NVSRAM for Low Power Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
CoRR, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
2019
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
A Novel Gate-Level On-Chip Crosstalk Noise Reduction Circuit for Deep Sub-micron Technology.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019
2017
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017