Swathi T. Gurumani
According to our database1,
Swathi T. Gurumani
authored at least 27 papers
between 2003 and 2019.
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Bibliography
2019
Hybrid Quick Error Detection: Validation and Debug of SoCs Through High-Level Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
2016
FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow.
IEEE Trans. Very Large Scale Integr. Syst., 2016
FCUDA-HB: Hierarchical and Scalable Bus Architecture Generation on FPGAs With the FCUDA Flow.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Platform choices and design demands for IoT platforms: cost, power, and performance tradeoffs.
IET Cyper-Phys. Syst.: Theory & Appl., 2016
SoC, NoC and Hierarchical Bus Implementations of Applications on FPGAs Using the FCUDA Flow.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Automated Verification Code Generation in HLS Using Software Execution Traces (Abstract Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
FCUDA-SoC: Platform Integration for Field-Programmable SoC with the CUDA-to-FPGA Compiler.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
Real-time system-level implementation of a telepresence robot using an embedded GPU platform.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Designing high-quality hardware on a development effort budget: A study of the current state of high-level synthesis.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014
2013
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2009
IEEE Des. Test Comput., 2009
2007
Energy-Efficient Dynamic Task Scheduling Algorithm for Reconfigurable System-on-Chip Architectures.
Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2007
Dynamic Power Management in Power-Aware Reconfigurable System-on-Chip Architectures.
Proceedings of the 2007 International Conference on Embedded Systems & Applications, 2007
2006
Performance Analysis of Coarse-Grained Parallel Particle Swarm Optimization.
Proceedings of the ISCA 19th International Conference on Parallel and Distributed Computing Systems, 2006
2004
Proceedings of the 42nd Annual Southeast Regional Conference, 2004
2003
Exploiting Fine-Grain Parallelism of IDEA Using Xilinx FPGA.
Proceedings of the ISCA 16th International Conference on Parallel and Distributed Computing Systems, 2003