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Swapnadip De

Orcid: 0000-0001-6250-1570

According to our database1, Swapnadip De authored at least 4 papers between 2012 and 2015.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2015
Implementation of Subthreshold Adiabatic Logic for Ultralow-Power Application.
[BibTeX]
[DOI]
Manash Chanda
,
Sankalp Jain
,
Swapnadip De
,
Chandan Kumar Sarkar
IEEE Trans. Very Large Scale Integr. Syst., 2015

Design and Analysis of 32-Bit CLA Using Energy Efficient Adiabatic Logic for Ultra-Low-Power Application.
[BibTeX]
[DOI]
Manash Chanda
,
Swapnadip De
,
Chandan Kumar Sarkar
J. Circuits Syst. Comput., 2015

2012
Effect of gate engineering in double-gate MOSFETs for analog/RF applications.
[BibTeX]
[DOI]
Angsuman Sarkar
,
Aloke Kumar Das
,
Swapnadip De
,
Chandan Kumar Sarkar
Microelectron. J., 2012

1/f noise and analogue performance study of short-channel cylindrical surrounding gate MOSFET using a new subthreshold analytical pseudo-two-dimensional model.
[BibTeX]
[DOI]
Angsuman Sarkar
,
Swapnadip De
,
Anup Dey
,
Chandan Kumar Sarkar
IET Circuits Devices Syst., 2012


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