Swagata Mandal
Orcid: 0000-0002-0534-3083
According to our database1,
Swagata Mandal
authored at least 17 papers
between 2013 and 2024.
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Bibliography
2024
Near Threshold Computation of Partitioned Ring Learning With Error (RLWE) Hardware Accelerator on Reconfigurable Architecture.
IEEE Access, 2024
2022
Near Threshold Computation of Partitioned Ring Learning With Error (RLWE) Post Quantum Cryptography on Reconfigurable Architecture.
CoRR, 2022
2021
IEEE Trans. Aerosp. Electron. Syst., 2021
2019
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM Based FPGA.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
2018
Proceedings of the VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, 2018
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
2017
Efficient dynamic priority based soft error mitigation techniques for configuration memory of FPGA hardware.
Microprocess. Microsystems, 2017
2016
IEEE Embed. Syst. Lett., 2016
2015
Outage Minimized Joint Power and Channel Allocation in Multihop Cognitive Radio Networks: A Lifetime-Centric Approach.
Wirel. Pers. Commun., 2015
High speed fault tolerant secure communication for muon chamber using fpga based gbt emulator.
CoRR, 2015
CoRR, 2015
CoRR, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
FPGA Implementation of High Speed Latency Optimized Optical Communication System Based on Orthogonal Concatenated Code.
Proceedings of the 24th IEEE Asian Test Symposium, 2015
2013
Joint power and channel allocation for outage probability minimization in cognitive radio ad hoc networks.
Proceedings of the Fifth International Conference on Communication Systems and Networks, 2013