Sushanta Bordoloi
Orcid: 0000-0002-5179-0861
According to our database1,
Sushanta Bordoloi
authored at least 3 papers
between 2017 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
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2019
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2021
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Bibliography
2021
Introspection Into Reliability Aspects in AlGaN/GaN HEMTs With Gate Geometry Modification.
IEEE Access, 2021
2019
Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
2017
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017