Suresh Srinivasan

Orcid: 0009-0006-7356-9806

According to our database1, Suresh Srinivasan authored at least 38 papers between 1998 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
An Experimental Evaluation of 360-Degree ABR Video Streaming over mmWave Wireless Links.
Proceedings of the IEEE International Conference on Metaverse Computing, 2024

2023
FBDT: Forward and Backward Data Transmission Across RATs for High Quality Mobile 360-Degree Video VR Streaming.
Proceedings of the 14th Conference on ACM Multimedia Systems, 2023

2022
Cost-Effective Energy Conservation Techniques for Textile Spinning Mills.
IEEE Access, 2022

2021
Real time assessment of power quality issues in 11 kV/440 V distribution feeder using distribution static synchronous compensator.
Trans. Inst. Meas. Control, 2021

Deep Transfer Learning for Cross-Device Channel Classification in mmWave Wireless.
Proceedings of the 17th International Conference on Mobility, Sensing and Networking, 2021

2020
The role of product innovation and customer centricity in transforming tacit and explicit knowledge into profitability.
J. Knowl. Manag., 2020

Fair Initial Access Design for mmWave Wireless.
Proceedings of the 28th IEEE International Conference on Network Protocols, 2020

2013
Split-Path Fused Floating Point Multiply Accumulate (FPMAC).
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013

2012
2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors.
IEEE J. Solid State Circuits, 2012

2011
Impact of Circuit Degradation on FPGA Design Security.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

2010
On the Effects of Process Variation in Network-on-Chip Architectures.
IEEE Trans. Dependable Secur. Comput., 2010

The UMLS-CORE project: a study of the problem list terminologies used in large healthcare institutions.
J. Am. Medical Informatics Assoc., 2010

A 320mV-to-1.2V on-die fine-grained reconfigurable fabric for DSP/media accelerators in 32nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

18Gbps, 50mW reconfigurable multi-mode SHA Hashing accelerator in 45nm CMOS.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009
A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2008
Toward Increasing FPGA Lifetime.
IEEE Trans. Dependable Secur. Comput., 2008

Exploring architectural solutions for energy optimisations in bus-based system-on-chip.
IET Comput. Digit. Tech., 2008

2007
Design of power-aware FPGA fabrics.
Int. J. Embed. Syst., 2007

Combining Lexical and Semantic Methods of Inter-terminology Mapping Using the UMLS.
Proceedings of the MEDINFO 2007 - Proceedings of the 12th World Congress on Health (Medical) Informatics, 2007

FPGA routing architecture analysis under variations.
Proceedings of the 25th International Conference on Computer Design, 2007

2006
Process Variation Aware Parallelization Strategies for MPSoCs.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Variation Aware Placement for FPGAs.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Transaction Level Error Susceptibility Model for Bus Based SoC Architectures.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

FLAW: FPGA lifetime awareness.
Proceedings of the 43rd Design Automation Conference, 2006

Leakage Optimized DECAP Design for FPGAs.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Who is Using the UMLS and How - Insights from the UMLS User Annual Reports.
Proceedings of the AMIA 2006, 2006

2005
Research Paper: Integrating SNOMED CT into the UMLS: An Exploration of Different Views of Synonymy and Quality of Editing.
J. Am. Medical Informatics Assoc., 2005

Simultaneous memory and bus partitioning for SoC architectures.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures.
Proceedings of the 2005 Design, 2005

Leakage control in FPGA routing fabric.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Achieving "Source Transparency" in the UMLS® Metathesaurus®.
Proceedings of the MEDINFO 2004, 2004

Improving soft-error tolerance of FPGA configuration bits.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2003
Adding neuronames to the UMLS metathesaurus.
Neuroinformatics, 2003

2002
Integration of a standard gastrointestinal endoscopy terminology in the UMLS Metathesaurus.
Proceedings of the AMIA 2002, 2002

Finding UMLS Metathesaurus concepts in MEDLINE.
Proceedings of the AMIA 2002, 2002

Tracking meaning over time in the UMLS Metathesaurus.
Proceedings of the AMIA 2002, 2002

2000
Discovering missed synonymy in a large concept-oriented Metathesaurus.
Proceedings of the AMIA 2000, 2000

1998
An Experience in Merging Thesauri: Using Terms from Other Thesauri to Enhance MeSH.
Proceedings of the AMIA 1998, 1998


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